Inventor · disambiguated record
Paul A. Nyhus
Also filed as: NYHUS PAUL · NYHUS PAUL A · NYHUS PAUL ANTON
54 granted patents·8 pending applications·388 citations·filing 2002–2025
98Inventor score
Top patents by PatentIndex Score
62 records- 0198US9666451B2Self-aligned via and plug patterning for back end of line (BEOL) interconnectsINTEL CORP·Filed 2013·Granted May 30, 2017·45 cites·25 claims
- 0298US7632610B2Sub-resolution assist featuresINTEL CORP·Filed 2004·Granted Dec 15, 2009·179 cites·20 claims
- 0396US10892223B2Advanced lithography and self-assembled devicesINTEL CORP·Filed 2016·Granted Jan 12, 2021·11 cites·25 claims
- 0496US9793163B2Subtractive self-aligned via and plug patterning for back end of line (BEOL) interconnectsINTEL CORP·Filed 2013·Granted Oct 17, 2017·28 cites·11 claims
- 0595US12218052B2Advanced lithography and self-assembled devicesINTEL CORP·Filed 2023·Granted Feb 4, 2025·1 cites·20 claims
- 0694US10211088B2Self-aligned isotropic etch of pre-formed vias and plugs for back end of line (BEOL) interconnectsINTEL CORP·Filed 2015·Granted Feb 19, 2019·11 cites·20 claims
- 0793US10325814B2Patterning of vertical nanowire transistor channel and gate with directed self assemblyINTEL CORP·Filed 2017·Granted Jun 18, 2019·5 cites·10 claims
- 0893US9793159B2Previous layer self-aligned via and plug patterning for back end of line (BEOL) interconnectsINTEL CORP·Filed 2013·Granted Oct 17, 2017·13 cites·18 claims
- 0993US9005875B2Pre-patterned hard mask for ultrafast lithographic imagingINTEL CORP·Filed 2013·Granted Apr 14, 2015·12 cites·20 claims
- 1091US11854787B2Advanced lithography and self-assembled devicesINTEL CORP·Filed 2022·Granted Dec 26, 2023·1 cites·19 claims
- 1191US9054215B2Patterning of vertical nanowire transistor channel and gate with directed self assemblyNYHUS PAUL A·Filed 2012·Granted Jun 9, 2015·9 cites·23 claims
- 1290US10559529B2Pitch division patterning approaches with increased overlay margin for back end of line (BEOL) interconnect fabrication and structures resulting therefromINTEL CORP·Filed 2016·Granted Feb 11, 2020·6 cites·26 claims
- 1390US10319625B2Metal via processing schemes with via critical dimension (CD) control for back end of line (BEOL) interconnects and the resulting structuresINTEL CORP·Filed 2015·Granted Jun 11, 2019·7 cites·20 claims
- 1489US7820550B2Negative tone double patterning methodINTEL CORP·Filed 2008·Granted Oct 26, 2010·10 cites·22 claims
- 1588US2025125260A1Advanced lithography and self-assembled devicesINTEL CORP·Filed 2024·Application pending·0 cites
- 1685US11373950B2Advanced lithography and self-assembled devicesINTEL CORP·Filed 2020·Granted Jun 28, 2022·1 cites·19 claims
- 1783US10204830B2Previous layer self-aligned via and plug patterning for back end of line (BEOL) interconnectsINTEL CORP·Filed 2017·Granted Feb 12, 2019·3 cites·20 claims
- 1882US9431518B2Patterning of vertical nanowire transistor channel and gate with directed self assemblyINTEL CORP·Filed 2016·Granted Aug 30, 2016·2 cites·11 claims
- 1982US7179570B2Chromeless phase shift lithography (CPL) masks having features to pattern large area line/space geometriesINTEL CORP·Filed 2005·Granted Feb 20, 2007·5 cites·10 claims
- 2079US10297467B2Self-aligned via and plug patterning for back end of line (BEOL) interconnectsINTEL CORP·Filed 2017·Granted May 21, 2019·2 cites·19 claims
- 2179US7816061B2Lithography masks for improved line-end patterningINTEL CORP·Filed 2007·Granted Oct 19, 2010·5 cites·15 claims
- 2276US7056645B2Use of chromeless phase shift features to pattern large area line/space geometriesINTEL CORP·Filed 2002·Granted Jun 6, 2006·12 cites·15 claims
- 2376US2025029915A1Vertical metal splitting using helmets and wrap-around dielectric spacersINTEL CORP·Filed 2024·Application pending·0 cites
- 2473US12249541B2Vertical edge blocking (VEB) technique for increasing patterning process marginINTEL CORP·Filed 2023·Granted Mar 11, 2025·0 cites·7 claims
- 2573US12080639B2Contact over active gate structures with metal oxide layers to inhibit shortingINTEL CORP·Filed 2019·Granted Sep 3, 2024·1 cites·17 claims
- 2673US2024249946A1Gate spacing in integrated circuit structuresINTEL CORP·Filed 2024·Application pending·0 cites
- 2772US11972979B21D vertical edge blocking (VEB) via and plugINTEL CORP·Filed 2023·Granted Apr 30, 2024·0 cites·22 claims
- 2872US10459338B2Exposure activated chemically amplified directed self-assembly (DSA) for back end of line (BEOL) pattern cutting and pluggingINTEL CORP·Filed 2017·Granted Oct 29, 2019·1 cites·3 claims
- 2972US9269630B2Patterning of vertical nanowire transistor channel and gate with directed self assemblyINTEL CORP·Filed 2015·Granted Feb 23, 2016·1 cites·20 claims
- 3072US7759028B2Sub-resolution assist featuresINTEL CORP·Filed 2009·Granted Jul 20, 2010·2 cites·22 claims
- 3171US9153477B2Directed self assembly of block copolymers to form vias aligned with interconnectsNYHUS PAUL A·Filed 2012·Granted Oct 6, 2015·3 cites·11 claims
- 3271US7374865B2Methods to pattern contacts using chromeless phase shift masksINTEL CORP·Filed 2002·Granted May 20, 2008·9 cites·10 claims
- 3369US2023307298A1Aligned pitch-quartered patterning for lithography edge placement error advanced rectificationINTEL CORP·Filed 2023·Application pending·0 cites
- 3467US9530688B2Directed self assembly of block copolymers to form vias aligned with interconnectsNYHUS PAUL A·Filed 2015·Granted Dec 27, 2016·1 cites·14 claims
- 3566US12266527B1Directed self-assembly enabled patterning over metal layers using assisting featuresINTEL CORP·Filed 2021·Granted Apr 1, 2025·0 cites·20 claims
- 3666US12131991B2Self aligned gratings for tight pitch interconnects and methods of fabricationINTEL CORP·Filed 2022·Granted Oct 29, 2024·0 cites·20 claims
- 3766US12002678B2Gate spacing in integrated circuit structuresINTEL CORP·Filed 2020·Granted Jun 4, 2024·0 cites·20 claims
- 3866US8959465B2Techniques for phase tuning for process optimizationNYHUS PAUL A·Filed 2011·Granted Feb 17, 2015·1 cites·23 claims
- 3964US12400913B2Contact over active gate structures with conductive trench contact taps for advanced integrated circuit structure fabricationINTEL CORP·Filed 2021·Granted Aug 26, 2025·0 cites·20 claims
- 4064US11527433B2Via and plug architectures for integrated circuit interconnects and methods of manufactureINTEL CORP·Filed 2016·Granted Dec 13, 2022·1 cites·7 claims
- 4164US2025174458A1Directed self-assembly enabled patterning over metal layers using assisting featuresINTEL CORP·Filed 2025·Application pending·0 cites
- 4262US12131989B2Vertical metal splitting using helmets and wrap-around dielectric spacersINTEL CORP·Filed 2020·Granted Oct 29, 2024·0 cites·19 claims
- 4362US10991599B2Self-aligned via and plug patterning for back end of line (BEOL) interconnectsINTEL CORP·Filed 2019·Granted Apr 27, 2021·0 cites·20 claims
- 4461US12087594B2Colored gratings in microelectronic structuresINTEL CORP·Filed 2020·Granted Sep 10, 2024·0 cites·20 claims
- 4559US9653576B2Patterning of vertical nanowire transistor channel and gate with directed self assemblyINTEL CORP·Filed 2016·Granted May 16, 2017·0 cites·12 claims
- 4657US11594448B2Vertical edge blocking (VEB) technique for increasing patterning process marginINTEL CORP·Filed 2019·Granted Feb 28, 2023·0 cites·18 claims
- 4757US10636700B2Metal via processing schemes with via critical dimension (CD) control for back end of line (BEOL) interconnects and the resulting structuresINTEL CORP·Filed 2019·Granted Apr 28, 2020·0 cites·20 claims
- 4857US10600678B2Self-aligned isotropic etch of pre-formed vias and plugs for back end of line (BEOL) interconnectsINTEL CORP·Filed 2019·Granted Mar 24, 2020·0 cites·16 claims
- 4955US12293913B1Directed self-assembly enabled subtractive metal patterningINTEL CORP·Filed 2021·Granted May 6, 2025·0 cites·20 claims
- 5055US11721580B21D vertical edge blocking (VEB) via and plugINTEL CORP·Filed 2019·Granted Aug 8, 2023·0 cites·11 claims
Showing the top 50 of 62 patent records by PatentIndex Score.
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