Inventor · disambiguated record
Shifeng Yu
Also filed as: CAPPELLANO IVANA · KHIEU CONG Q · YU SHIFENG · YU SHIFENG JACK
7 granted patents·1 pending application·98 citations·filing 2002–2013
86Inventor score
Top patents by PatentIndex Score
8 records- 0192US8860497B1Oxide stress reduction for a cascode stack circuitNVIDIA CORP·Filed 2013·Granted Oct 14, 2014·25 cites·20 claims
- 0291US7570088B1Input/output buffer for wide supply voltage rangeNVIDIA CORP·Filed 2005·Granted Aug 4, 2009·22 cites·22 claims
- 0379US6700418B2Output driver having dynamic impedance controlSUN MICROSYSTEMS INC·Filed 2002·Granted Mar 2, 2004·24 cites·6 claims
- 0467US8793091B2System and method for integrated circuit calibrationKU TING·Filed 2008·Granted Jul 29, 2014·5 cites·26 claims
- 0566US7053677B2Input/output device having linearized output responseSUN MICROSYSTEMS INC·Filed 2002·Granted May 30, 2006·12 cites·18 claims
- 0651US6906561B2Cascode stage input/output deviceSUN MICROSYSTEMS INC·Filed 2002·Granted Jun 14, 2005·6 cites·13 claims
- 0747US6600348B1Input/output device having dynamic delaySUN MICROSYSTEMS INC·Filed 2002·Granted Jul 29, 2003·4 cites·20 claims
- 0843US2009259864A1System and method for input/output control during power down modeNVIDIA CORP·Filed 2008·Application pending·0 cites
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