Inventor · disambiguated record
George Z. Chrysos
Also filed as: CHRYSOS GEORGE · CHRYSOS GEORGE Z · CHRYSOS GEORGE ZACHARIAS
49 granted patents·9 pending applications·1,688 citations·filing 1996–2024
98Inventor score
Files withINTEL CORP23COMPAQ COMPUTER CORP10MICROSOFT TECHNOLOGY LICENSING LLC8DIGITAL EQUIPMENT CORP4CHRYSOS GEORGE Z2
Top patents by PatentIndex Score
58 records- 0197US11847459B2Direct swap caching with zero line optimizationsMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2022·Granted Dec 19, 2023·18 cites·20 claims
- 0296US6549930B1Method for scheduling threads in a multithreaded processorCOMPAQ COMPUTER CORP·Filed 1997·Granted Apr 15, 2003·298 cites·10 claims
- 0394US10795853B2Multiple dies hardware processors and methodsINTEL CORP·Filed 2017·Granted Oct 6, 2020·9 cites·24 claims
- 0494US6470443B1Pipelined multi-thread processor selecting thread instruction in inter-stage buffer based on count informationCOMPAQ COMPUTER CORP·Filed 2000·Granted Oct 22, 2002·104 cites·8 claims
- 0592US11321171B1Memory operations management in computing systemsMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2021·Granted May 3, 2022·3 cites·20 claims
- 0691US11586579B2Multiple dies hardware processors and methodsINTEL CORP·Filed 2021·Granted Feb 21, 2023·2 cites·24 claims
- 0790US6000044AApparatus for randomly sampling instructions in a processor pipelineDIGITAL EQUIPMENT CORP·Filed 1997·Granted Dec 7, 1999·169 cites·29 claims
- 0889US6073159AThread properties attribute vector based thread selection in multithreading processorCOMPAQ COMPUTER CORP·Filed 1996·Granted Jun 6, 2000·150 cites·71 claims
- 0988US8407421B2Cache spill management techniques using cache spill predictionSTEELY JR SIMON C·Filed 2009·Granted Mar 26, 2013·17 cites·29 claims
- 1088US5809450AMethod for estimating statistics of properties of instructions processed by a processor pipelineDIGITAL EQUIPMENT CORP·Filed 1997·Granted Sep 15, 1998·148 cites·23 claims
- 1186US6374367B1Apparatus and method for monitoring a computer system to guide optimizationCOMPAQ COMPUTER CORP·Filed 1997·Granted Apr 16, 2002·124 cites·13 claims
- 1285US10671740B2Supporting configurable security levels for memory address rangesINTEL CORP·Filed 2018·Granted Jun 2, 2020·3 cites·20 claims
- 1385US6324616B2Dynamically inhibiting competing resource requesters in favor of above threshold usage requester to reduce response delayCOMPAQ COMPUTER CORP·Filed 2001·Granted Nov 27, 2001·35 cites·25 claims
- 1483US11599415B2Memory tiering techniques in computing systemsMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2021·Granted Mar 7, 2023·1 cites·20 claims
- 1582US9959418B2Supporting configurable security levels for memory address rangesINTEL CORP·Filed 2015·Granted May 1, 2018·3 cites·18 claims
- 1681US9465670B2Generational thread scheduler using reservations for fair schedulingGROCHOWSKI EDWARD T·Filed 2011·Granted Oct 11, 2016·7 cites·20 claims
- 1781US6195748B1Apparatus for sampling instruction execution information in a processor pipelineCOMPAQ COMPUTER CORP·Filed 1997·Granted Feb 27, 2001·96 cites·49 claims
- 1880US7353414B2Credit-based activity regulation within a microprocessor based on an allowable activity levelINTEL CORP·Filed 2005·Granted Apr 1, 2008·8 cites·27 claims
- 1980US6108770AMethod and apparatus for predicting memory dependence using store setsDIGITAL EQUIPMENT CORP·Filed 1998·Granted Aug 22, 2000·93 cites·39 claims
- 2079US12204909B2Direct swap caching with zero line optimizationsMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2023·Granted Jan 21, 2025·0 cites·20 claims
- 2179US8078831B2Method and apparatus for affinity-guided speculative helper threads in chip multiprocessorsWANG HONG·Filed 2010·Granted Dec 13, 2011·5 cites·8 claims
- 2279US6163840AMethod and apparatus for sampling multiple potentially concurrent instructions in a processor pipelineCOMPAQ COMPUTER CORP·Filed 1997·Granted Dec 19, 2000·87 cites·39 claims
- 2379US5923872AApparatus for sampling instruction operand or result values in a processor pipelineDIGITAL EQUIPMENT CORP·Filed 1997·Granted Jul 13, 1999·84 cites·32 claims
- 2479US2025103339A1Direct swap caching with zero line optimizationsMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2024·Application pending·0 cites
- 2579US2025110829A1Memory tiering techniques in computing systemsMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2024·Application pending·0 cites
- 2678US12086080B2Apparatuses, methods, and systems for a configurable accelerator having dataflow execution circuitsINTEL CORP·Filed 2020·Granted Sep 10, 2024·2 cites·24 claims
- 2778US8190863B2Apparatus and method for heterogeneous chip multiprocessors via resource allocation and restrictionFOSSUM TRYGGVE·Filed 2004·Granted May 29, 2012·24 cites·5 claims
- 2876US11899615B2Multiple dies hardware processors and methodsINTEL CORP·Filed 2023·Granted Feb 13, 2024·0 cites·24 claims
- 2976US7003648B2Flexible demand-based resource allocation for multiple requestors in a simultaneous multi-threaded CPUHEWLETT PACKARD DEVELOPMENT CO·Filed 2002·Granted Feb 21, 2006·24 cites·32 claims
- 3075US7710904B2Ring network with variable token activationINTEL CORP·Filed 2006·Granted May 4, 2010·6 cites·23 claims
- 3174US12204408B2Memory tiering techniques in computing systemsMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2023·Granted Jan 21, 2025·0 cites·20 claims
- 3272US6233645B1Dynamically disabling speculative prefetch when high priority demand fetch opportunity use is highCOMPAQ COMPUTER CORP·Filed 1998·Granted May 15, 2001·52 cites·27 claims
- 3370US9875185B2Memory sequencing with coherent and non-coherent sub-systemsINTEL CORP·Filed 2014·Granted Jan 23, 2018·2 cites·20 claims
- 3470US7624236B2Predictive early write-back of owned cache blocks in a shared memory computer systemINTEL CORP·Filed 2004·Granted Nov 24, 2009·14 cites·22 claims
- 3568US7747897B2Method and apparatus for lockstep processing on a fixed-latency interconnectINTEL CORP·Filed 2005·Granted Jun 29, 2010·4 cites·10 claims
- 3665US11294852B2Multiple dies hardware processors and methodsINTEL CORP·Filed 2020·Granted Apr 5, 2022·0 cites·25 claims
- 3765US7689844B2Credit-based activity regulation within a microprocessor based on an accumulative credit systemINTEL CORP·Filed 2007·Granted Mar 30, 2010·2 cites·20 claims
- 3863US10230528B2Tree-less integrity and replay memory protection for trusted execution environmentINTEL CORP·Filed 2015·Granted Mar 12, 2019·1 cites·20 claims
- 3963US9785436B2Apparatus and method for efficient gather and scatter operationsINTEL CORP·Filed 2012·Granted Oct 10, 2017·1 cites·26 claims
- 4063US7733898B2Method and apparatus for preventing starvation in a slotted-ring networkINTEL CORP·Filed 2004·Granted Jun 8, 2010·8 cites·17 claims
- 4160US8924690B2Apparatus and method for heterogeneous chip multiprocessors via resource allocation and restrictionFOSSUM TRYGGVE·Filed 2012·Granted Dec 30, 2014·1 cites·20 claims
- 4260US6175814B1Apparatus for determining the instantaneous average number of instructions processedCOMPAQ COMPUTER CORP·Filed 1997·Granted Jan 16, 2001·36 cites·13 claims
- 4360US6148396AApparatus for sampling path history in a processor pipelineCOMPAQ COMPUTER CORP·Filed 1997·Granted Nov 14, 2000·36 cites·43 claims
- 4458US10719317B2Hardware apparatuses and methods relating to elemental register accessesINTEL CORP·Filed 2018·Granted Jul 21, 2020·0 cites·24 claims
- 4557US9996347B2Hardware apparatuses and methods relating to elemental register accessesINTEL CORP·Filed 2014·Granted Jun 12, 2018·0 cites·24 claims
- 4657US8209490B2Protocol for maintaining cache coherency in a CMPMATTINA MATTHEW·Filed 2003·Granted Jun 26, 2012·5 cites·12 claims
- 4755US10261904B2Memory sequencing with coherent and non-coherent sub-systemsINTEL CORP·Filed 2017·Granted Apr 16, 2019·0 cites·18 claims
- 4855US7607048B2Method and apparatus for protecting TLB's VPN from soft errorsINTEL CORP·Filed 2004·Granted Oct 20, 2009·4 cites·14 claims
- 4951US7844801B2Method and apparatus for affinity-guided speculative helper threads in chip multiprocessorsINTEL CORP·Filed 2003·Granted Nov 30, 2010·2 cites·32 claims
- 5049US2017031729A1Generational Thread SchedulerINTEL CORP·Filed 2016·Application pending·0 cites
Showing the top 50 of 58 patent records by PatentIndex Score.
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