Inventor · disambiguated record
Vern A. Victoria
Also filed as: VICTORIA VERN A · VICTORIA VERN ANTHONY
5 granted patents·16 citations·filing 2006–2009
71Inventor score
Technology areasG06F
Top patents by PatentIndex Score
5 records- 0177US7480886B2VLSI timing optimization with interleaved buffer insertion and wire sizing stagesIBM·Filed 2006·Granted Jan 20, 2009·11 cites·8 claims
- 0264US7882472B2Method, apparatus, and computer program product for automatically waiving non-compute indications for a timing analysis processIBM·Filed 2007·Granted Feb 1, 2011·4 cites·20 claims
- 0347US8103989B2Method and system for changing circuits in an integrated circuitDOTSON NATHAN A·Filed 2008·Granted Jan 24, 2012·1 cites·9 claims
- 0443US7752585B2Method, apparatus, and computer program product for stale NDR detectionIBM·Filed 2007·Granted Jul 6, 2010·0 cites·20 claims
- 0535US8185371B2Modeling full and half cycle clock variabilityBHANJI ADIL·Filed 2009·Granted May 22, 2012·0 cites·20 claims
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →