Inventor

NACHIMUTHU MURUGASAMY K

US82 patents

⚠️ This page may combine multiple inventors who share the name “NACHIMUTHU MURUGASAMY K”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

NACHIMUTHU MURUGASAMY K

INTEL CORP

Configurable computing resource physical location determination

Technologies for providing remote access to a shared memory pool

Technologies for efficiently managing allocation of memory in a shared memory pool

Techniques to verify and authenticate resources in a data center computer environment

Controlling memory redundancy in a system

Cloud-based scale-up system composition

Cloud-based scale-up system composition

Techniques to configure physical compute resources for workloads via circuit switching

Technologies for providing manifest-based asset representation

Technologies for efficiently booting sleds in a disaggregated architecture

Technologies for lifecycle management with remote firmware

Accelerator resource allocation and pooling

Dynamic memory for compute resources in a data center

Technologies for managing errors in a remotely accessible memory pool

Mechanism for disaggregated storage class memory over fabric

Memory system

Secure tunneling access to debug test ports on non-volatile memory storage units

Techniques to verify and authenticate resources in a data center computer environment

Techniques to control system updates and configuration changes via the cloud

Update of boot code handlers

Runtime firmware activation for memory devices

Technologies for lifecycle management with remote firmware

Out-of-band management of FPGA bitstreams

Techniques to configure physical compute resources for workloads via circuit switching

Non-volatile memory express over fabric (NVMeOF) using volume management device

Method and apparatus for performing error handling operations using error signals

Mechanisms for SAS-free cabling in rack scale design

Method and apparatus to shutdown a memory channel

Unified hardware and software two-level memory

Apparatus, method and system that stores bios in non-volatile random access memory

High performance persistent memory

Accelerating boot time zeroing of memory based on non-volatile memory (NVM) technology

Methods and apparatus for SDI support for fast startup

Methods and apparatus for composite node malleability for disaggregated architectures

Distributed storage location hinting for non-volatile memories

Techniques for handling errors in persistent memory

Allocating and configuring persistent memory

Allocating and configuring persistent memory

Technologies for fast booting with error-correcting code memory

Out-of-band management of FPGA bitstreams

Technologies for providing efficient pooling for a hyper converged infrastructure

Unified hardware and software two-level memory

Technologies for configuration-free platform firmware

NACHIMUTHU MURUGASAMY K

System and method for intelligently flushing data from a processor into a memory subsystem

Apparatus, method and system that stores bios in non-volatile random access memory

Autonomous initialization of non-volatile random access memory in a computer system

Method and apparatus to shutdown a memory channel

KUMAR MOHAN J

Enhanced system sleep state support in servers using non-volatile random access memory

SWANSON ROBERT C

Controlling memory redundancy in a system

VARGAS JOSE A

Machine check summary register