Inventor · disambiguated record
Joon-Wan Chai
Also filed as: CHAI JOON-WAN
4 granted patents·1 pending application·31 citations·filing 1998–2023
71Inventor score
Files withSAMSUNG ELECTRONICS CO LTD5
Top patents by PatentIndex Score
5 records- 0176US2024086603A1Device for generating verification vector for circuit design verification, circuit design system, and reinforcement learning method of the device and the circuit design systemSAMSUNG ELECTRONICS CO LTD·Filed 2023·Application pending·0 cites
- 0273US11861280B2Device for generating verification vector for circuit design verification, circuit design system, and reinforcement learning method of the device and the circuit design systemSAMSUNG ELECTRONICS CO LTD·Filed 2022·Granted Jan 2, 2024·0 cites·20 claims
- 0366US11281832B2Device for generating verification vector for circuit design verification, circuit design system, and reinforcement learning method of the device and the circuit design systemSAMSUNG ELECTRONICS CO LTD·Filed 2020·Granted Mar 22, 2022·0 cites·12 claims
- 0456US6046947AIntegrated circuit memory devices having direct access mode test capability and methods of testing sameSAMSUNG ELECTRONICS CO LTD·Filed 1998·Granted Apr 4, 2000·22 cites·27 claims
- 0552US6914850B2Address buffer having (N/2) stagesSAMSUNG ELECTRONICS CO LTD·Filed 2003·Granted Jul 5, 2005·9 cites·13 claims
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →