Inventor · disambiguated record
Shaun Lytollis
Also filed as: LYTOLLIS SHAUN
12 granted patents·4 pending applications·62 citations·filing 1994–2024
88Inventor score
Top patents by PatentIndex Score
16 records- 0192US11265011B2Forward error correction including correction capability determinations based on symbol errors of error bit based codewordsMARVELL ASIA PTE LTD·Filed 2020·Granted Mar 1, 2022·3 cites·19 claims
- 0292US10009214B1Multiplexers with protection switchingINPHI CORP·Filed 2017·Granted Jun 26, 2018·11 cites·20 claims
- 0381US10236907B2Forward error correction (FEC) emulatorINPHI CORP·Filed 2018·Granted Mar 19, 2019·3 cites·14 claims
- 0478US10749732B2Multiplexers with protection switchingINPHI CORP·Filed 2020·Granted Aug 18, 2020·1 cites·20 claims
- 0574US9998146B2Forward error correction (FEC) emulatorINPHI CORP·Filed 2016·Granted Jun 12, 2018·2 cites·14 claims
- 0667US10944620B2Multiplexers with protection switchingINPHI CORP·Filed 2020·Granted Mar 9, 2021·0 cites·19 claims
- 0759US10587452B2Multiplexers with protection switchingINPHI CORP·Filed 2018·Granted Mar 10, 2020·0 cites·20 claims
- 0859US5604888AEmulation system employing motherboard and flexible daughterboardsZYCAD CORP·Filed 1994·Granted Feb 18, 1997·40 cites·23 claims
- 0958US10205625B1Multiplexers with protection switchingINPHI CORP·Filed 2018·Granted Feb 12, 2019·0 cites·20 claims
- 1057US2025219753A1Latency measurement in a communication deviceMARVELL ASIA PTE LTD·Filed 2024·Application pending·0 cites
- 1155US10637501B2Forward error correction (FEC) emulatorINPHI CORP·Filed 2019·Granted Apr 28, 2020·0 cites·20 claims
- 1244US2008195363A1Analogue Signal Modelling Routine for a Hardware Description LanguageLYTOLLIS SHAUN·Filed 2008·Application pending·0 cites
- 1341US7580492B2Clock recoveryTEXAS INSTRUMENTS INC·Filed 2005·Granted Aug 25, 2009·0 cites·1 claims
- 1441US2008212718A1Multi-Rate Tracking CircuitLYTOLLIS SHAUN·Filed 2008·Application pending·0 cites
- 1536US2008191774A1Clock CircuitLYTOLLIS SHAUN·Filed 2008·Application pending·0 cites
- 1634US7146284B2Method of testing phase lock loop status during a Serializer/Deserializer internal loopback built-in self-testTEXAS INSTRUMENTS INC·Filed 2003·Granted Dec 5, 2006·2 cites·17 claims
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