Inventor · disambiguated record
Peter J. Ruscito
Also filed as: RUSCITO PETER · RUSCITO PETER J
10 granted patents·1 pending application·395 citations·filing 1995–2013
91Inventor score
Technology areasG06F
Top patents by PatentIndex Score
11 records- 0192US7430578B2Method and apparatus for performing multiply-add operations on packed byte dataINTEL CORP·Filed 2003·Granted Sep 30, 2008·98 cites·32 claims
- 0290US8793470B2Length determination of instruction code with address form field and escape opcode value by evaluating portions other than instruction specific opcodeINTEL CORP·Filed 2013·Granted Jul 29, 2014·9 cites·20 claims
- 0386US7552254B1Associating address space identifiers with active contextsINTEL CORP·Filed 2003·Granted Jun 23, 2009·46 cites·20 claims
- 0486US5696929AFlash EEPROM main memory in a computer systemINTEL CORP·Filed 1995·Granted Dec 9, 1997·177 cites·15 claims
- 0579US7966476B2Determining length of instruction with escape and addressing form bytes without evaluating opcodeINTEL CORP·Filed 2008·Granted Jun 21, 2011·6 cites·30 claims
- 0671US8402252B2Determining length of instruction with address form field exclusive of evaluating instruction specific opcode in three byte escape opcodeCOKE JAMES S·Filed 2012·Granted Mar 19, 2013·2 cites·19 claims
- 0763US7917734B2Determining length of instruction with multiple byte escape code based on information from other than opcode byteINTEL CORP·Filed 2003·Granted Mar 29, 2011·6 cites·46 claims
- 0856US6434650B1Apparatus and method for multiplexing bi-directional data onto a low pin count bus between a host CPU and co-processorINTEL CORP·Filed 1998·Granted Aug 13, 2002·31 cites·33 claims
- 0949US8161269B2Determining length of instruction with address form field exclusive of evaluating instruction specific opcode in three byte escape opcodeCOKE JAMES S·Filed 2011·Granted Apr 17, 2012·0 cites·28 claims
- 1046US6463494B1Method and system for implementing control signals on a low pin count busINTEL CORP·Filed 1998·Granted Oct 8, 2002·20 cites·11 claims
- 1140US2002140690A1Computer with communicating separable computing display subsystemFiled 2001·Application pending·0 cites
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