Inventor · disambiguated record
Hung-Chang Hsieh
Also filed as: HSIEH HUNG C · HSIEH HUNG-CHANG
84 granted patents·14 pending applications·993 citations·filing 1998–2020
99Inventor score
Files withTAIWAN SEMICONDUCTOR MFG40TAIWAN SEMICONDUCTOR MFG CO LTD24DELTA ELECTRONICS INC9CHEN CHUN-CHANG4HSIEH HUNG-CHANG2
Top patents by PatentIndex Score
98 records- 0199US9304403B2System and method for lithography alignmentTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Apr 5, 2016·64 cites·20 claims
- 0299US8975129B1Method of making a FinFET deviceTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Mar 10, 2015·60 cites·20 claims
- 0398US9875892B2Method of forming a photoresist layerTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2015·Granted Jan 23, 2018·70 cites·20 claims
- 0497US9153483B2Method of semiconductor integrated circuit fabricationTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Oct 6, 2015·28 cites·20 claims
- 0597US9028915B2Method of forming a photoresist layerCHANG CHUN-WEI·Filed 2012·Granted May 12, 2015·111 cites·16 claims
- 0696US9034723B1Method of making a FinFET deviceTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted May 19, 2015·28 cites·20 claims
- 0795US9711367B1Semiconductor method with wafer edge modificationTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2016·Granted Jul 18, 2017·23 cites·20 claims
- 0895US7383530B2System and method for examining mask pattern fidelityTAIWAN SEMICONDUCTOR MFG·Filed 2007·Granted Jun 3, 2008·27 cites·12 claims
- 0992US6319821B1Dual damascene approach for small geometry dimensionTAIWAN SEMICONDUCTOR MFG·Filed 2000·Granted Nov 20, 2001·66 cites·3 claims
- 1090US10459353B2Lithography system with an embedded cleaning moduleTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2014·Granted Oct 29, 2019·5 cites·20 claims
- 1190US10096519B2Method of making a FinFET deviceTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2016·Granted Oct 9, 2018·5 cites·20 claims
- 1289US9799567B2Method of forming source/drain contactTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2014·Granted Oct 24, 2017·8 cites·20 claims
- 1389US8940574B2Metal grid in backside illumination image sensor chips and methods for forming the sameWANG CHIH-CHIEN·Filed 2012·Granted Jan 27, 2015·8 cites·22 claims
- 1488US6174818B1Method of patterning narrow gate electrodeTAIWAN SEMICONDUCTOR MFG·Filed 1999·Granted Jan 16, 2001·77 cites·15 claims
- 1587US10163720B2Method of forming source/drain contactTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2017·Granted Dec 25, 2018·4 cites·20 claims
- 1687US8916482B2Method of making a lithography maskLEE HSIN-CHANG·Filed 2012·Granted Dec 23, 2014·5 cites·12 claims
- 1787US8098364B2Exposure apparatus and method for photolithography processYU VINVENT·Filed 2007·Granted Jan 17, 2012·18 cites·13 claims
- 1886US9437497B2Method of making a FinFET deviceTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2013·Granted Sep 6, 2016·8 cites·20 claims
- 1985US9823574B2Lithography alignment marksTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2015·Granted Nov 21, 2017·4 cites·20 claims
- 2085US7589970B2Assembled structure of power semiconductor device and heat sinkDELTA ELECTRONICS INC·Filed 2007·Granted Sep 15, 2009·13 cites·15 claims
- 2184US8313889B2Double patterning method using metallic compound mask layerYU VINCENT·Filed 2010·Granted Nov 20, 2012·6 cites·20 claims
- 2283US10672656B2Method of semiconductor integrated circuit fabricationTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2015·Granted Jun 2, 2020·3 cites·20 claims
- 2383US9466486B2Method for integrated circuit patterningTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2013·Granted Oct 11, 2016·5 cites·20 claims
- 2482US9158209B2Method of overlay predictionTAIWAN SEMICONDUCTOR MFG·Filed 2012·Granted Oct 13, 2015·5 cites·20 claims
- 2582US6242813B1Deep-submicron integrated circuit package for improving bondabilityTAIWAN SEMICONDUCTOR MFG·Filed 2000·Granted Jun 5, 2001·32 cites·6 claims
- 2682US5894350AMethod of in line intra-field correction of overlay alignmentTAIWAN SEMICONDUCTOR MFG·Filed 1998·Granted Apr 13, 1999·49 cites·17 claims
- 2780US8409456B2Planarization method for high wafer topographyLAN SHUN-WEI·Filed 2011·Granted Apr 2, 2013·8 cites·24 claims
- 2879US9703918B2Two-dimensional process window improvementTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2015·Granted Jul 11, 2017·2 cites·20 claims
- 2978US9443768B2Method of making a FinFET deviceTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2015·Granted Sep 13, 2016·2 cites·20 claims
- 3078US9349662B2Test structure placement on a semiconductor waferTAIWAN SEMICONDUCTOR MFG·Filed 2012·Granted May 24, 2016·5 cites·14 claims
- 3178US6352818B1Photoresist development method employing multiple photoresist developer rinseTAIWAN SEMICONDUCTOR MFG·Filed 1999·Granted Mar 5, 2002·40 cites·1 claims
- 3277US9285677B2Lithography process on high topology featuresTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Mar 15, 2016·2 cites·20 claims
- 3377US8703403B2Method and apparatus for drying a waferHUANG WEI-CHIEH·Filed 2011·Granted Apr 22, 2014·4 cites·20 claims
- 3476US7897297B2Method and system for optimizing intra-field critical dimension uniformity using a sacrificial twin maskTAIWAN SEMICONDUCTOR MFG·Filed 2007·Granted Mar 1, 2011·3 cites·18 claims
- 3575US11081394B2Method of making a FinFET deviceTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2018·Granted Aug 3, 2021·1 cites·20 claims
- 3674US9176387B2Method and apparatus for drying a waferTAIWAN SEMICONDUCTOR MFG·Filed 2014·Granted Nov 3, 2015·2 cites·18 claims
- 3771US9805154B2Method of lithography process with inserting scattering barsTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2015·Granted Oct 31, 2017·2 cites·20 claims
- 3871US7759136B2Critical dimension (CD) control by spectrum metrologyTAIWAN SEMICONDUCTOR MFG·Filed 2006·Granted Jul 20, 2010·4 cites·16 claims
- 3971US6312876B1Method for placing identifying mark on semiconductor waferTAIWAN SEMICONDUCTOR MFG·Filed 1999·Granted Nov 6, 2001·32 cites·4 claims
- 4068US8972912B1Structure for chip extensionTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2013·Granted Mar 3, 2015·2 cites·20 claims
- 4168US6362093B1Dual damascene method employing sacrificial via fill layerTAIWAN SEMICONDUCTOR MFG·Filed 1999·Granted Mar 26, 2002·35 cites·38 claims
- 4267US11735477B2Method of semiconductor integrated circuit fabricationTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Aug 22, 2023·0 cites·20 claims
- 4367US9651869B2Film portion at wafer edgeTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2015·Granted May 16, 2017·1 cites·20 claims
- 4467US8416393B2Cross quadrupole double lithography method and apparatus for semiconductor device fabrication using two aperturesWANG HSIEN-CHENG·Filed 2009·Granted Apr 9, 2013·2 cites·19 claims
- 4566US10101659B2Lithography method with surface modification layerTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2016·Granted Oct 16, 2018·1 cites·21 claims
- 4666US9372406B2Film portion at wafer edgeTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Jun 21, 2016·1 cites·18 claims
- 4766US8987008B2Integrated circuit layout and method with double patterningTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Mar 24, 2015·1 cites·17 claims
- 4866US8466070B2Methods of forming semiconductor structuresCHOU HSING-FEI·Filed 2011·Granted Jun 18, 2013·2 cites·20 claims
- 4965US11378894B2Lithography system with an embedded cleaning moduleTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Jul 5, 2022·0 cites·20 claims
- 5065US8580637B2Method of patterning a semiconductor device having improved spacing and shape control and a semiconductor deviceCHEN JHUN HUA·Filed 2011·Granted Nov 12, 2013·2 cites·20 claims
Showing the top 50 of 98 patent records by PatentIndex Score.
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