Inventor · disambiguated record
Mark E. Dean
Also filed as: DEAN MARK E · DEAN MARK EDWARD
47 granted patents·2,188 citations·filing 1981–2017
99Inventor score
Top patents by PatentIndex Score
47 records- 0194US10019470B2Method and apparatus for constructing, using and reusing components and structures of an artifical neural networkUNIV TENNESSEE RES FOUND·Filed 2014·Granted Jul 10, 2018·37 cites·21 claims
- 0294US5544342ASystem and method for prefetching information in a processing systemIBM·Filed 1995·Granted Aug 6, 1996·249 cites·20 claims
- 0392US10248675B2Method and apparatus for providing real-time monitoring of an artifical neural networkUNIV TENNESSEE RES FOUND·Filed 2014·Granted Apr 2, 2019·22 cites·24 claims
- 0492US7987158B2Method, system and article of manufacture for metadata replication and restorationIBM·Filed 2005·Granted Jul 26, 2011·33 cites·20 claims
- 0592US5553276ASelf-time processor with dynamic clock generator having plurality of tracking elements for outputting sequencing signals to functional unitsIBM·Filed 1994·Granted Sep 3, 1996·175 cites·20 claims
- 0692US5034917AComputer system including a page mode memory with decreased access time and method of operation thereofBLAND PATRICK M·Filed 1988·Granted Jul 23, 1991·137 cites·5 claims
- 0791US9753959B2Method and apparatus for constructing a neuroscience-inspired artificial neural network with visualization of neural pathwaysUNIV TENNESSEE RES FOUND·Filed 2014·Granted Sep 5, 2017·27 cites·26 claims
- 0889US10095718B2Method and apparatus for constructing a dynamic adaptive neural network array (DANNA)UNIV TENNESSEE RES FOUND·Filed 2014·Granted Oct 9, 2018·15 cites·45 claims
- 0988US5129090ASystem bus preempt for 80386 when running in an 80386/82385 microcomputer system with arbitrationIBM·Filed 1988·Granted Jul 7, 1992·29 cites·5 claims
- 1087US10055434B2Method and apparatus for providing random selection and long-term potentiation and depression in an artificial networkUNIV TENNESSEE RES FOUND·Filed 2014·Granted Aug 21, 2018·13 cites·21 claims
- 1186US6338122B1Non-uniform memory access (NUMA) data processing system that speculatively forwards a read request to a remote processing nodeIBM·Filed 1998·Granted Jan 8, 2002·137 cites·24 claims
- 1284US10929745B2Method and apparatus for constructing a neuroscience-inspired artificial neural network with visualization of neural pathwaysUNIV TENNESSEE RES FOUND·Filed 2017·Granted Feb 23, 2021·4 cites·20 claims
- 1384US6763474B1System for synchronizing nodes in a heterogeneous computer system by using multistage frequency synthesizer to dynamically adjust clock frequency of the nodesIBM·Filed 2000·Granted Jul 13, 2004·35 cites·12 claims
- 1482US6148361AInterrupt architecture for a non-uniform memory access (NUMA) data processing systemIBM·Filed 1998·Granted Nov 14, 2000·114 cites·26 claims
- 1581US6275907B1Reservation management in a non-uniform memory access (NUMA) data processing systemIBM·Filed 1998·Granted Aug 14, 2001·97 cites·19 claims
- 1679US6266745B1Method and system in a distributed shared-memory data processing system for determining utilization of nodes by each executed threadIBM·Filed 1998·Granted Jul 24, 2001·107 cites·12 claims
- 1777US6067603ANon-uniform memory access (NUMA) data processing system that speculatively issues requests on a node interconnectIBM·Filed 1998·Granted May 23, 2000·80 cites·16 claims
- 1874US6336170B1Method and system in a distributed shared-memory data processing system for determining utilization of shared-memory included within nodes by a designated applicationIBM·Filed 1998·Granted Jan 1, 2002·67 cites·18 claims
- 1973US4437092AColor video display system having programmable border colorIBM·Filed 1981·Granted Mar 13, 1984·28 cites·3 claims
- 2071US6081874ANon-uniform memory access (NUMA) data processing system that speculatively issues requests on a node interconnectIBM·Filed 1998·Granted Jun 27, 2000·58 cites·18 claims
- 2170US6566921B1Apparatus and method for high resolution frequency adjustment in a multistage frequency synthesizerIBM·Filed 2000·Granted May 20, 2003·19 cites·28 claims
- 2270US5125084AControl of pipelined operation in a microcomputer system employing dynamic bus sizing with 80386 processor and 82385 cache controllerIBM·Filed 1988·Granted Jun 23, 1992·41 cites·9 claims
- 2369US6522207B1Apparatus and method for dynamic frequency adjustment in a frequency synthesizerIBM·Filed 2000·Granted Feb 18, 2003·17 cites·15 claims
- 2469US5045998AMethod and apparatus for selectively posting write cycles using the 82385 cache controllerIBM·Filed 1989·Granted Sep 3, 1991·39 cites·6 claims
- 2568US6334177B1Method and system for supporting software partitions and dynamic reconfiguration within a non-uniform memory access systemIBM·Filed 1998·Granted Dec 25, 2001·56 cites·18 claims
- 2668US6067611ANon-uniform memory access (NUMA) data processing system that buffers potential third node transactions to decrease communication latencyIBM·Filed 1998·Granted May 23, 2000·52 cites·14 claims
- 2766US4528626AMicrocomputer system with bus control means for peripheral processing devicesIBM·Filed 1984·Granted Jul 9, 1985·30 cites·8 claims
- 2864US6088750AMethod and system for arbitrating between bus masters having diverse bus acquisition protocolsIBM·Filed 1999·Granted Jul 11, 2000·39 cites·10 claims
- 2963US4598356AData processing system including a main processor and a co-processor and co-processor error handling logicIBM·Filed 1983·Granted Jul 1, 1986·26 cites·5 claims
- 3063US4442428AComposite video color signal generation from digital color signalsIBM·Filed 1981·Granted Apr 10, 1984·18 cites·4 claims
- 3162US6115804ANon-uniform memory access (NUMA) data processing system that permits multiple caches to concurrently hold data in a recent state from which data can be sourced by shared interventionIBM·Filed 1999·Granted Sep 5, 2000·79 cites·10 claims
- 3261US6266743B1Method and system for providing an eviction protocol within a non-uniform memory access systemIBM·Filed 1999·Granted Jul 24, 2001·37 cites·14 claims
- 3359US6192452B1Method and system for avoiding data loss due to cancelled transactions within a non-uniform memory access systemIBM·Filed 1999·Granted Feb 20, 2001·37 cites·8 claims
- 3457US5175826ADelayed cache write enable circuit for a dual bus microcomputer system with an 80386 and 82385IBM·Filed 1988·Granted Dec 29, 1992·24 cites·3 claims
- 3557US4575826ARefresh generator system for a dynamic memoryIBM·Filed 1984·Granted Mar 11, 1986·10 cites·10 claims
- 3655US5548746ANon-contiguous mapping of I/O addresses to use page protection of a processIBM·Filed 1993·Granted Aug 20, 1996·27 cites·12 claims
- 3753US6226718B1Method and system for avoiding livelocks due to stale exclusive/modified directory entries within a non-uniform access systemIBM·Filed 1999·Granted May 1, 2001·26 cites·10 claims
- 3853US5170481AMicroprocessor hold and lock circuitryIBM·Filed 1989·Granted Dec 8, 1992·19 cites·16 claims
- 3950US6269428B1Method and system for avoiding livelocks due to colliding invalidating transactions within a non-uniform memory access systemIBM·Filed 1999·Granted Jul 31, 2001·21 cites·10 claims
- 4049US5603041AMethod and system for reading from a m-byte memory utilizing a processor having a n-byte data busIBM·Filed 1994·Granted Feb 11, 1997·19 cites·21 claims
- 4148US5448521AConnecting a short word length non-volatile memory to a long word length address/data multiplexed busIBM·Filed 1993·Granted Sep 5, 1995·20 cites·14 claims
- 4248US5327545AData processing apparatus for selectively posting write cycles using the 82385 cache controllerIBM·Filed 1991·Granted Jul 5, 1994·19 cites·7 claims
- 4347US5768550ABus interface logic systemIBM·Filed 1995·Granted Jun 16, 1998·19 cites·17 claims
- 4445US5107507ABidirectional buffer with latch and parity capabilityIBM·Filed 1988·Granted Apr 21, 1992·14 cites·10 claims
- 4544US7206163B2Data storage device for recording to magnetic threadIBM·Filed 2004·Granted Apr 17, 2007·0 cites·28 claims
- 4639US5898857AMethod and system for interfacing an upgrade processor to a data processing systemIBM·Filed 1994·Granted Apr 27, 1999·9 cites·11 claims
- 4736US5450559AMicrocomputer system employing address offset mechanism to increase the supported cache memory capacityIBM·Filed 1991·Granted Sep 12, 1995·7 cites·14 claims
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