Inventor · disambiguated record
Michael P. Woo
Also filed as: WOO MICHAEL · WOO MICHAEL P
20 granted patents·1,129 citations·filing 1989–2008
97Inventor score
Top patents by PatentIndex Score
20 records- 0193US4997790AProcess for forming a self-aligned contact structureMOTOROLA INC·Filed 1990·Granted Mar 5, 1991·120 cites·17 claims
- 0292US5451543AStraight sidewall profile contact opening to underlying interconnect and method for making the sameMOTOROLA INC·Filed 1994·Granted Sep 19, 1995·147 cites·5 claims
- 0389US5262352AMethod for forming an interconnection structure for conductive layersMOTOROLA INC·Filed 1992·Granted Nov 16, 1993·92 cites·20 claims
- 0488US5408130AInterconnection structure for conductive layersMOTOROLA INC·Filed 1994·Granted Apr 18, 1995·86 cites·18 claims
- 0586US5381040ASmall geometry contactMOTOROLA INC·Filed 1993·Granted Jan 10, 1995·80 cites·17 claims
- 0686US5210435AITLDD transistor having a variable work functionMOTOROLA INC·Filed 1991·Granted May 11, 1993·69 cites·7 claims
- 0784US5061647AITLDD transistor having variable work function and method for fabricating the sameMOTOROLA INC·Filed 1990·Granted Oct 29, 1991·61 cites·16 claims
- 0883US5498560AProcess for forming an electrically programmable read-only memory cellMOTOROLA INC·Filed 1994·Granted Mar 12, 1996·39 cites·22 claims
- 0982US5158910AProcess for forming a contact structureMOTOROLA INC·Filed 1990·Granted Oct 27, 1992·73 cites·21 claims
- 1081US4897364AMethod for locos isolation using a framed oxidation mask and a polysilicon buffer layerMOTOROLA INC·Filed 1989·Granted Jan 30, 1990·57 cites·10 claims
- 1178US5037777AMethod for forming a multi-layer semiconductor device using selective planarizationMOTOROLA INC·Filed 1990·Granted Aug 6, 1991·69 cites·13 claims
- 1277US5405806AMethod for forming a metal silicide interconnect in an integrated circuitMOTOROLA INC·Filed 1994·Granted Apr 11, 1995·58 cites·19 claims
- 1374US5279990AMethod of making a small geometry contact using sidewall spacersMOTOROLA INC·Filed 1993·Granted Jan 18, 1994·43 cites·15 claims
- 1470US6686633B1Semiconductor device, memory cell, and processes for forming themMOTOROLA INC·Filed 2000·Granted Feb 3, 2004·16 cites·20 claims
- 1568US5034351AProcess for forming a feature on a substrate without recessing the surface of the substrateMOTOROLA INC·Filed 1990·Granted Jul 23, 1991·45 cites·10 claims
- 1664US7867858B2Hybrid transistor based power gating switch circuit and methodFREESCALE SEMICONDUCTOR INC·Filed 2008·Granted Jan 11, 2011·3 cites·18 claims
- 1764US6184073B1Process for forming a semiconductor device having an interconnect or conductive film electrically insulated from a conductive member or regionMOTOROLA INC·Filed 1997·Granted Feb 6, 2001·27 cites·14 claims
- 1862US6440805B1Method of forming a semiconductor device with isolation and well regionsMOTOTROLA INC·Filed 2000·Granted Aug 27, 2002·14 cites·10 claims
- 1952US6291888B1Contact structure and process for formationMOTOROLA INC·Filed 1999·Granted Sep 18, 2001·15 cites·22 claims
- 2051US6037246AMethod of making a contact structureMOTOROLA INC·Filed 1996·Granted Mar 14, 2000·15 cites·27 claims
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