Inventor · disambiguated record
Sunil Ashtaputre
Also filed as: ASHTAPUTRE SUNIL · ASHTAPUTRE SUNIL V
11 granted patents·561 citations·filing 1989–1997
93Inventor score
Top patents by PatentIndex Score
11 records- 0175US5974245AMethod and apparatus for making integrated circuits by inserting buffers into a netlistVSLI TECHNOLOGY INC·Filed 1997·Granted Oct 26, 1999·69 cites·20 claims
- 0275US5638291AMethod and apparatus for making integrated circuits by inserting buffers into a netlist to control clock skewVLSI TECHNOLOGY INC·Filed 1994·Granted Jun 10, 1997·63 cites·20 claims
- 0375US5072402ARouting system and method for integrated circuitsVLSI TECHNOLOGY INC·Filed 1989·Granted Dec 10, 1991·68 cites·8 claims
- 0473US5353235AWire length minimization in channel compactorVLSI TECHNOLOGY INC·Filed 1992·Granted Oct 4, 1994·63 cites·16 claims
- 0572US5666290AInteractive time-driven method of component placement that more directly constrains critical paths using net-based constraintsVLSI TECHNOLOGY INC·Filed 1995·Granted Sep 9, 1997·69 cites·22 claims
- 0671US5485396ASymbolic routing guidance for wire networks in VLSI circuitsVLSI TECHNOLOGY INC·Filed 1991·Granted Jan 16, 1996·56 cites·13 claims
- 0766US5953236AMethod and apparatus for implementing engineering change orders in integrated circuit designsVLSI TECHNOLOGY INC·Filed 1995·Granted Sep 14, 1999·58 cites·21 claims
- 0863US6014506AMethod and apparatus for improving engineering change order placement in integrated circuit designsVLSI TECHNOLOGY INC·Filed 1996·Granted Jan 11, 2000·52 cites·29 claims
- 0963US5349536AMethod for optimally placing components of a VLSI circuitVLSI TECHNOLOGY INC·Filed 1991·Granted Sep 20, 1994·40 cites·20 claims
- 1054US5399517AMethod of routing three layer metal gate arrays using a channel routerVLSI TECHNOLOGY INC·Filed 1992·Granted Mar 21, 1995·17 cites·8 claims
- 1132US5377125AImproved pad ring routerVLSI TECHNOLOGY INC·Filed 1992·Granted Dec 27, 1994·6 cites·21 claims
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