Inventor

DULUK JR JEROME F

US129 patents

⚠️ This page may combine multiple inventors who share the name “DULUK JR JEROME F”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

DULUK JR JEROME F

APPLE COMPUTER

Graphics processor with pipeline state storage and retrieval

System, apparatus and method for spatially sorting image data in a three-dimensional graphics pipeline

Graphics processor with pipeline state storage and retrieval

Method and apparatus for performing conservative hidden surface removal in a graphics processor with deferred shading

Deferred shading graphics pipeline processor having advanced features

Deferred shading graphics pipeline processor having advanced features

Apparatus and method for fragment operations in a 3D-graphics pipeline

Graphics processor with deferred shading

Method and apparatus for generating texture

Method and apparatus for span and subspan sorting rendering system

Deferred shading graphics pipeline processor

Deferred shading graphics pipeline processor

Apparatus and method for performing setup operations in a 3-D graphics pipeline using unified primitive descriptors

Apparatus and method for geometry operations in a 3D-graphics pipeline

Method and apparatus for culling in a graphics processor with deferred shading

Graphical rendering system using simultaneous parallel query Z-buffer and method therefor

Method and apparatus for generating texture

System, apparatus, method, and computer program for execution-order preserving uncached write combine operation

NVIDIA CORP

Counter-based delay of dependent thread group execution

Predicated launching of compute thread arrays

Method and apparatus for display image adjustment

Method and apparatus for display image adjustment

Hardware override of application programming interface programmed state

Managing event count reports in a tile-based architecture

Higher accuracy Z-culling in a tile-based architecture

Migration directives in a unified virtual memory system architecture

Migrating pages of different sizes between heterogeneous processors

Common pointers in unified virtual memory system

Page state directory for managing unified virtual memory

Migration of peer-mapped memory pages

Replaying memory transactions while resolving memory access faults

Programmable blending in multi-threaded processing units

System, method, and computer program product for simultaneous execution of compute and graphics workloads

Managing per-tile event count reports in a tile-based architecture

SILICON ENGINES INC

Method and apparatus for simultaneous parallel query graphics rendering Z-coordinate buffer

Method and apparatus for spatial simulation acceleration

Bounding box and projections detection of hidden polygons in three-dimensional spatial databases

System and method for cross correlation with application to video motion vector estimator

DULUK JR JEROME F

Content-addressable memory system capable of fully parallel magnitude comparisons

Thread count throttling for efficient resource utilization

Hardware override of application programming interface programmed state

APPLE INC

Deferred shading graphics pipeline processor having advanced features

RAYCER INC

Method and apparatus for span and subspan sorting rendering system

SILICON ENGINES

Cascaded two-stage computational SIMD engine having multi-port memory and multiple arithmetic units

ELECTRONIC PRODUCTS INC

Flexible electrical test fixure for integrated circuits on prototype and production printed circuit boards

LINDHOLM JOHN ERIK

Method and system for connecting multiple shaders

JONES STEPHEN

Technique for computational nested parallelism

BOLZ JEFFREY A

GPU work creation and stateless graphics in OPENGL

ABDALLA KARIM M

Scheduling and execution of compute tasks

MONTRYM JOHN S

Determining a working set of texture maps