Inventor · disambiguated record
Michael Drop
Also filed as: DROP MICHAEL · DROP MICHAEL J
13 granted patents·3 pending applications·71 citations·filing 2004–2017
89Inventor score
Top patents by PatentIndex Score
16 records- 0190US9875785B2Refresh timer synchronization between memory controller and memoryQUALCOMM INC·Filed 2016·Granted Jan 23, 2018·13 cites·17 claims
- 0287US9734878B1Systems and methods for individually configuring dynamic random access memories sharing a common command access busQUALCOMM INC·Filed 2016·Granted Aug 15, 2017·5 cites·30 claims
- 0387US9123408B2Low latency synchronization scheme for mesochronous DDR systemQUALCOMM INC·Filed 2013·Granted Sep 1, 2015·10 cites·25 claims
- 0473US9705620B2Synchronization of endpoints using tunable latencyQUALCOMM INC·Filed 2015·Granted Jul 11, 2017·2 cites·18 claims
- 0573US7437580B2Dynamic voltage scaling systemQUALCOMM INC·Filed 2004·Granted Oct 14, 2008·24 cites·42 claims
- 0672US9632562B2Systems and methods for reducing volatile memory standby power in a portable computing deviceQUALCOMM INC·Filed 2015·Granted Apr 25, 2017·4 cites·30 claims
- 0771US8352759B2System and method of monitoring a central processing unit in real timeQUALCOMM INC·Filed 2010·Granted Jan 8, 2013·3 cites·16 claims
- 0871US8098539B2Hybrid single and dual channel DDR interface scheme by interleaving address/control signals during dual channel operationSANKURATRI RAGHU·Filed 2009·Granted Jan 17, 2012·8 cites·37 claims
- 0961US9396109B2Method and apparatus for DRAM spatial coalescing within a single channelQUALCOMM INC·Filed 2013·Granted Jul 19, 2016·1 cites·24 claims
- 1058US9734890B1Systems and methods for individually configuring dynamic random access memories sharing a common command access busQUALCOMM INC·Filed 2016·Granted Aug 15, 2017·1 cites·30 claims
- 1152US9437278B2Low latency synchronization scheme for mesochronous DDR systemQUALCOMM INC·Filed 2015·Granted Sep 6, 2016·0 cites·24 claims
- 1252US9086877B2System and method of monitoring a central processing unit in real timeQUALCOMM INC·Filed 2012·Granted Jul 21, 2015·0 cites·22 claims
- 1347US2016093345A1Dynamic random access memory timing adjustmentsQUALCOMM INC·Filed 2014·Application pending·0 cites
- 1446US10642337B2Active power management in a computing device subsystem based on micro-idle durationQUALCOMM INC·Filed 2017·Granted May 5, 2020·0 cites·30 claims
- 1538US2016112183A1Signal sampling timing drift compensationQUALCOMM INC·Filed 2014·Application pending·0 cites
- 1629US2016127259A1System and method for managing safe downtime of shared resources within a pcdQUALCOMM INC·Filed 2015·Application pending·0 cites
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →