Inventor · disambiguated record
Julius Mandelblat
Also filed as: MANDELBLAT JULIUS · MANDELBLAT JULIUS Y · MANDELBLAT JULIUS YULI
27 granted patents·12 pending applications·49 citations·filing 2005–2025
94Inventor score
Top patents by PatentIndex Score
39 records- 0187US9559726B2Use of error correcting code to carry additional data bitsINTEL CORP·Filed 2015·Granted Jan 31, 2017·7 cites·24 claims
- 0284US9734079B2Hybrid exclusive multi-level memory architecture with memory managementINTEL CORP·Filed 2013·Granted Aug 15, 2017·9 cites·27 claims
- 0383US9563564B2Cache allocation with code and data prioritizationINTEL CORP·Filed 2015·Granted Feb 7, 2017·3 cites·20 claims
- 0482US12393430B2Methods and apparatus to increase boot performance by categorizing boot tasksINTEL CORP·Filed 2021·Granted Aug 19, 2025·1 cites·24 claims
- 0580US10089229B2Cache allocation with code and data prioritizationINTEL CORP·Filed 2017·Granted Oct 2, 2018·2 cites·20 claims
- 0677US12189479B2Apparatus and method for detecting and recovering from data fetch errorsINTEL CORP·Filed 2022·Granted Jan 7, 2025·0 cites·25 claims
- 0775US9990287B2Apparatus and method for memory-hierarchy aware producer-consumer instructionRAIKIN SHLOMO·Filed 2011·Granted Jun 5, 2018·4 cites·21 claims
- 0875US9448879B2Apparatus and method for implement a multi-level memory hierarchyYIGZAW THEODROS·Filed 2011·Granted Sep 20, 2016·4 cites·24 claims
- 0972US9418013B2Selective prefetching for a sectored cacheANANTARAMAN ARAVINDH V·Filed 2014·Granted Aug 16, 2016·4 cites·20 claims
- 1072US2025217882A1Systems, Apparatuses, and Methods for Resource Bandwidth EnforcementINTEL CORP·Filed 2025·Application pending·0 cites
- 1170US12198186B2Systems, apparatuses, and methods for resource bandwidth enforcementINTEL CORP·Filed 2021·Granted Jan 14, 2025·0 cites·13 claims
- 1269US11436118B2Apparatus and method for adaptively scheduling work on heterogeneous processing resourcesINTEL CORP·Filed 2019·Granted Sep 6, 2022·1 cites·27 claims
- 1369US2021318932A1Apparatus and method for detecting and recovering from data fetch errorsINTEL CORP·Filed 2021·Application pending·0 cites
- 1467US8347035B2Posting weakly ordered transactionsINTEL CORP·Filed 2008·Granted Jan 1, 2013·4 cites·20 claims
- 1566US10877693B2Architecture for dynamic transformation of memory configurationINTEL CORP·Filed 2018·Granted Dec 29, 2020·1 cites·16 claims
- 1664US11048587B2Apparatus and method for detecting and recovering from data fetch errorsINTEL CORP·Filed 2019·Granted Jun 29, 2021·0 cites·25 claims
- 1763US8458539B2G-ODLAT on-die logic analyzer trigger with parallel vector finite state machineKURTS TSVIKA·Filed 2010·Granted Jun 4, 2013·3 cites·19 claims
- 1862US7590913B2Method and apparatus of reporting memory bit correctionINTEL CORP·Filed 2005·Granted Sep 15, 2009·2 cites·25 claims
- 1961US7958510B2Device, system and method of managing a resource requestINTEL CORP·Filed 2005·Granted Jun 7, 2011·2 cites·20 claims
- 2059US8015365B2Reducing back invalidation transactions from a snoop filterINTEL CORP·Filed 2008·Granted Sep 6, 2011·1 cites·20 claims
- 2159US7558946B2Breaking a lock situation in a processor without detection of the lock situation using a multi-level approachINTEL CORP·Filed 2005·Granted Jul 7, 2009·1 cites·28 claims
- 2257US12008398B2Performance monitoring in heterogeneous systemsINTEL CORP·Filed 2019·Granted Jun 11, 2024·0 cites·19 claims
- 2357US2025307033A1Apparatus and method including scheduling support circuitry for scheduling tasks on an efficiency cluster for improved performanceINTEL CORP·Filed 2024·Application pending·0 cites
- 2456US2025307153A1Apparatus and Method for Performance and Energy Efficient ComputeINTEL CORP·Filed 2024·Application pending·0 cites
- 2553US10223204B2Apparatus and method for detecting and recovering from data fetch errorsYIGZAW THEODROS·Filed 2011·Granted Mar 5, 2019·0 cites·18 claims
- 2652US2025307146A1Coherent cache fabric with reduced power modeINTEL CORP·Filed 2024·Application pending·0 cites
- 2751US2024202120A1Integrated circuit chip to selectively provide tag array functionality or cache array functionalityINTEL CORP·Filed 2022·Application pending·0 cites
- 2850US2016284021A1Systems, Apparatuses, and Methods for Resource Bandwidth EnforcementHERDRICH ANDREW·Filed 2015·Application pending·0 cites
- 2950US2024220408A1Dynamic allocation schemes in memory side cache for bandwidth and performance optimizationINTEL CORP·Filed 2022·Application pending·0 cites
- 3048US12455612B2Device, method and system to provide thread scheduling hints to a software processINTEL CORP·Filed 2021·Granted Oct 28, 2025·0 cites·20 claims
- 3147US10915453B2Multi level system memory having different caching structures and memory controller that supports concurrent look-up into the different caching structuresINTEL CORP·Filed 2016·Granted Feb 9, 2021·0 cites·18 claims
- 3245US10175992B2Systems and methods for enhancing BIOS performance by alleviating code-size limitationsINTEL CORP·Filed 2016·Granted Jan 8, 2019·0 cites·20 claims
- 3345US10153784B2Use of error correcting code to carry additional data bitsINTEL CORP·Filed 2017·Granted Dec 11, 2018·0 cites·21 claims
- 3445US9471088B2Restricting clock signal delivery in a processorINTEL CORP·Filed 2013·Granted Oct 18, 2016·0 cites·16 claims
- 3544US10936490B2System and method for per-agent control and quality of service of shared resources in chip multiprocessor platformsINTEL CORP·Filed 2017·Granted Mar 2, 2021·0 cites·30 claims
- 3643US2007043965A1Dynamic memory sizing for power reductionINTEL CORP·Filed 2005·Application pending·0 cites
- 3743US2007150663A1Device, system and method of multi-state cache coherence schemeMENDELSON ABRAHAM·Filed 2005·Application pending·0 cites
- 3842US2019102324A1Cache behavior for secure memory repartitioning systemsINTEL CORP·Filed 2017·Application pending·0 cites
- 3941US2015188797A1Adaptive admission control for on die interconnectSATAT GUY·Filed 2013·Application pending·0 cites
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