Inventor · disambiguated record
Joseph Gerald Mcdonald
Also filed as: MCDONALD JOSEPH · MCDONALD JOSEPH G · MCDONALD JOSEPH GERALD
24 granted patents·4 pending applications·328 citations·filing 1997–2020
95Inventor score
Top patents by PatentIndex Score
28 records- 0191US6334162B1Efficient data transfer mechanism for input/out devices having a device driver generating a descriptor queue and monitoring a status queueIBM·Filed 2000·Granted Dec 25, 2001·51 cites·4 claims
- 0278US11550723B2Method, apparatus, and system for memory bandwidth aware data prefetchingQUALCOMM INC·Filed 2018·Granted Jan 10, 2023·2 cites·26 claims
- 0378US8938587B2Data recovery for coherent attached processor proxyIBM·Filed 2013·Granted Jan 20, 2015·4 cites·18 claims
- 0474US9448846B2Dynamically configurable hardware queues for dispatching jobs to a plurality of hardware acceleration enginesBASS BRIAN MITCHELL·Filed 2011·Granted Sep 20, 2016·3 cites·13 claims
- 0573US6049842AEfficient data transfer mechanism for input/output devicesIBM·Filed 1997·Granted Apr 11, 2000·46 cites·19 claims
- 0669US9817774B2Bridge and method for coupling a requesting interconnect and a serving interconnect in a computer systemIBM·Filed 2015·Granted Nov 14, 2017·1 cites·1 claims
- 0768US9785580B2Bridge and method for coupling a requesting interconnect and a serving interconnect in a computer systemIBM·Filed 2015·Granted Oct 10, 2017·1 cites·12 claims
- 0868US9753871B2Bridge and method for coupling a requesting interconnect and a serving interconnect in a computer systemIBM·Filed 2015·Granted Sep 5, 2017·1 cites·5 claims
- 0968US5905913ASystem for collecting a specified number of peripheral interrupts and transferring the interrupts as a group to the processorIBM·Filed 1997·Granted May 18, 1999·55 cites·10 claims
- 1067US9727498B2Bridge and method for coupling a requesting interconnect and a serving interconnect in a computer systemIBM·Filed 2015·Granted Aug 8, 2017·1 cites·8 claims
- 1167US6618357B1Queue management for networks employing pause time based flow controlIBM·Filed 1999·Granted Sep 9, 2003·62 cites·20 claims
- 1265US9229868B2Data recovery for coherent attached processor proxyIBM·Filed 2013·Granted Jan 5, 2016·1 cites·7 claims
- 1363US6185207B1Communication system having a local area network adapter for selectively deleting information and method thereforIBM·Filed 1997·Granted Feb 6, 2001·26 cites·25 claims
- 1459US10067889B2Bridge and method for coupling a requesting interconnect and a serving interconnect in a computer systemIBM·Filed 2017·Granted Sep 4, 2018·0 cites·12 claims
- 1558US6272564B1Efficient data transfer mechanism for input/output devicesIBM·Filed 1999·Granted Aug 7, 2001·22 cites·4 claims
- 1655US11226910B2Ticket based request flow controlQUALCOMM INC·Filed 2020·Granted Jan 18, 2022·0 cites·44 claims
- 1755US9606838B2Dynamically configurable hardware queues for dispatching jobs to a plurality of hardware acceleration enginesIBM·Filed 2015·Granted Mar 28, 2017·0 cites·4 claims
- 1854US9710310B2Dynamically configurable hardware queues for dispatching jobs to a plurality of hardware acceleration enginesIBM·Filed 2015·Granted Jul 18, 2017·0 cites·3 claims
- 1951US6163820AEfficient data transfer mechanism for input/output devicesIBM·Filed 1999·Granted Dec 19, 2000·16 cites·5 claims
- 2050US11016899B2Selectively honoring speculative memory prefetch requests based on bandwidth state of a memory access path component(s) in a processor-based systemQUALCOMM INC·Filed 2019·Granted May 25, 2021·0 cites·38 claims
- 2150US9594713B2Bridging strongly ordered write transactions to devices in weakly ordered domains, and related apparatuses, methods, and computer-readable mediaQUALCOMM INC·Filed 2014·Granted Mar 14, 2017·0 cites·20 claims
- 2248US6073181AMulti-buffer error detection for an open data-link interface LAN adapterIBM·Filed 1997·Granted Jun 6, 2000·24 cites·18 claims
- 2347US6338102B1Efficient data transfer mechanism for input/output devices having a device driver generating a descriptor queue and monitoring a status queueIBM·Filed 1999·Granted Jan 8, 2002·12 cites·5 claims
- 2446US2015074357A1Direct snoop interventionQUALCOMM INC·Filed 2014·Application pending·0 cites
- 2545US8230117B2Techniques for write-after-write ordering in a coherency managed processor system that employs a command pipelineDALY JR GEORGE WILLIAM·Filed 2009·Granted Jul 24, 2012·0 cites·20 claims
- 2643US2019087333A1Converting a stale cache memory unique request to a read unique snoop response in a multiple (multi-) central processing unit (cpu) processor to reduce latency associated with reissuing the stale unique requestQUALCOMM INC·Filed 2018·Application pending·0 cites
- 2742US2019012265A1Providing multi-socket memory coherency using cross-socket snoop filtering in processor-based systemsQUALCOMM INC·Filed 2017·Application pending·0 cites
- 2838US2014244813A1Server cluster initiationMCDONALD JOSEPH·Filed 2013·Application pending·0 cites
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