Inventor · disambiguated record
Subarnarekha Sinha
Also filed as: SINHA SUBARNAREKHA
22 granted patents·3 pending applications·401 citations·filing 2004–2025
95Inventor score
Top patents by PatentIndex Score
25 records- 0198US7509622B2Dummy filling technique for improved planarization of chip surface topographySYNOPSYS INC·Filed 2006·Granted Mar 24, 2009·243 cites·29 claims
- 0290US8601419B1Accurate process hotspot detection using critical design rule extractionSYNOPSYS INC·Filed 2012·Granted Dec 3, 2013·27 cites·36 claims
- 0390US7703067B2Range pattern definition of susceptibility of layout regions to fabrication issuesSYNOPSYS INC·Filed 2006·Granted Apr 20, 2010·10 cites·24 claims
- 0490US7503029B2Identifying layout regions susceptible to fabrication issues by using range patternsSYNOPSYS INC·Filed 2006·Granted Mar 10, 2009·27 cites·23 claims
- 0585US8490030B1Distance metric for accurate lithographic hotspot classification using radial and angular functionsCHIANG CHARLES C·Filed 2012·Granted Jul 16, 2013·14 cites·22 claims
- 0684US8006212B2Method and system for facilitating floorplanning for 3D ICSYNOPSYS INC·Filed 2008·Granted Aug 23, 2011·14 cites·30 claims
- 0782US7346865B2Fast evaluation of average critical area for IC layoutsSYNOPSYS INC·Filed 2004·Granted Mar 18, 2008·23 cites·27 claims
- 0880US9098649B2Distance metric for accurate lithographic hotspot classification using radial and angular functionsSYNOPSYS INC·Filed 2013·Granted Aug 4, 2015·5 cites·21 claims
- 0976US7543255B2Method and apparatus to reduce random yield lossSYNOPSYS INC·Filed 2007·Granted Jun 2, 2009·8 cites·13 claims
- 1075US8219941B2Range pattern definition of susceptibility of layout regions to fabrication issuesSINHA SUBARNAREKHA·Filed 2009·Granted Jul 10, 2012·6 cites·22 claims
- 1174US7679872B2Electrostatic-discharge protection using a micro-electromechanical-system switchSYNOPSYS INC·Filed 2008·Granted Mar 16, 2010·7 cites·22 claims
- 1267US7962873B2Fast evaluation of average critical area for ic layoutsSYNOPSYS INC·Filed 2008·Granted Jun 14, 2011·2 cites·15 claims
- 1367US2025266129A1Machine Learning Platform for Polygenic Models23ANDME INC·Filed 2025·Application pending·0 cites
- 1466US8000826B2Predicting IC manufacturing yield by considering both systematic and random intra-die process variationsSYNOPSYS INC·Filed 2006·Granted Aug 16, 2011·4 cites·18 claims
- 1565US8209639B2Identifying layout regions susceptible to fabrication issues by using range patternsSINHA SUBARNAREKHA·Filed 2009·Granted Jun 26, 2012·3 cites·21 claims
- 1664US2024120028A1Learning Architecture and Pipelines for Granular Determination of Genetic Ancestry23ANDME INC·Filed 2023·Application pending·0 cites
- 1763US8141007B2Method and apparatus for identifying and correcting phase conflictsSINHA SUBARNAREKHA·Filed 2009·Granted Mar 20, 2012·1 cites·14 claims
- 1862US2021375392A1Machine learning platform for generating risk models23ANDME INC·Filed 2021·Application pending·0 cites
- 1961US8205185B2Fast evaluation of average critical area for IC layoutsSU QING·Filed 2009·Granted Jun 19, 2012·1 cites·14 claims
- 2061US8205179B2Fast evaluation of average critical area for IC layoutsSU QING·Filed 2009·Granted Jun 19, 2012·1 cites·21 claims
- 2161US7962882B2Fast evaluation of average critical area for IC layoutsSYNOPSYS INC·Filed 2008·Granted Jun 14, 2011·1 cites·14 claims
- 2254US8452075B2Range pattern matching for hotspots containing vias and incompletely specified range patternsXU JINGYU·Filed 2007·Granted May 28, 2013·2 cites·12 claims
- 2349US7496883B2Method and apparatus for identifying and correcting phase conflictsSYNOPSYS INC·Filed 2005·Granted Feb 24, 2009·0 cites·7 claims
- 2446US8578313B2Pattern-clip-based hotspot database system for layout verificationTANG ZONGWU·Filed 2008·Granted Nov 5, 2013·1 cites·22 claims
- 2546US8566754B2Dual-purpose perturbation engine for automatically processing pattern-clip-based manufacturing hotspotsKWANG KENT Y·Filed 2008·Granted Oct 22, 2013·1 cites·21 claims
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