Inventor · disambiguated record
Shou-Tsung Wang
Also filed as: WANG SHOU-TSUNG
8 granted patents·3 pending applications·66 citations·filing 2003–2008
85Inventor score
Top patents by PatentIndex Score
11 records- 0191US7271649B2DC offset calibration apparatusMEDIATEK INC·Filed 2005·Granted Sep 18, 2007·29 cites·23 claims
- 0278US7508277B2Phase-locked loop with VCO tuning sensitivity compensationMEDIATEK INC·Filed 2005·Granted Mar 24, 2009·14 cites·10 claims
- 0376US7933575B2Circuit for settling DC offset in direct conversion receiverMEDIATEK INC·Filed 2008·Granted Apr 26, 2011·6 cites·20 claims
- 0467US7567787B2Apparatus and method of feeding internal calibration signal through electro-static discharge protection circuitryMEDIATEK INC·Filed 2006·Granted Jul 28, 2009·4 cites·25 claims
- 0565US7760003B2Controllable resistive circuit for providing a continuous variable resistanceMEDIATEK INC·Filed 2006·Granted Jul 20, 2010·5 cites·13 claims
- 0663US8195096B2Apparatus and method for enhancing DC offset correction speed of a radio deviceCHIU CHINQ-SHIUN·Filed 2006·Granted Jun 5, 2012·3 cites·37 claims
- 0754US7679869B2Input/output device capable of blocking external interference signalsMEDIATEK INC·Filed 2006·Granted Mar 16, 2010·1 cites·16 claims
- 0848US7363013B2Phase lock loop applying in wireless communication system and method thereofMEDIATEK INC·Filed 2003·Granted Apr 22, 2008·4 cites·24 claims
- 0940US2004147238A1Analog demodulator in a low-if receiverFiled 2004·Application pending·0 cites
- 1039US2008284495A1Mos capacitor with large constant valueMEDIATEK INC·Filed 2007·Application pending·0 cites
- 1137US2006234664A1Calibration method for suppressing second order distortionMEDIATEK INC·Filed 2005·Application pending·0 cites
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