Inventor · disambiguated record
Ying-Tsong Loh
Also filed as: LOH YING T · LOH YING TSONG
18 granted patents·1 pending application·705 citations·filing 1991–2008
96Inventor score
Top patents by PatentIndex Score
19 records- 0192US5759901AFabrication method for sub-half micron CMOS transistorVLSI TECHNOLOGY INC·Filed 1997·Granted Jun 2, 1998·140 cites·39 claims
- 0289US5516707ALarge-tilted-angle nitrogen implant into dielectric regions overlaying source/drain regions of a transistorVLSI TECHNOLOGY INC·Filed 1995·Granted May 14, 1996·98 cites·3 claims
- 0382US5821558AAntifuse structuresVLSI TECHNOLOGY INC·Filed 1997·Granted Oct 13, 1998·41 cites·24 claims
- 0480US5789795AMethods and apparatus for fabricationg anti-fuse devicesVLSI TECHNOLOGY INC·Filed 1995·Granted Aug 4, 1998·68 cites·13 claims
- 0577US5496751AMethod of forming an ESD and hot carrier resistant integrated circuit structureVLSI TECHNOLOGY INC·Filed 1995·Granted Mar 5, 1996·48 cites·16 claims
- 0676US5631485AESD and hot carrier resistant integrated circuit structureVLSI TECHNOLOGY INC·Filed 1995·Granted May 20, 1997·46 cites·17 claims
- 0775US5793640ACapacitance measurement using an RLC circuit modelVLSI TECHNOLOGY INC·Filed 1996·Granted Aug 11, 1998·39 cites·4 claims
- 0871US5196357AMethod of making extended polysilicon self-aligned gate overlapped lightly doped drain structure for submicron transistorVLSI TECHNOLOGY INC·Filed 1991·Granted Mar 23, 1993·34 cites·20 claims
- 0967US5773317ATest structure and method for determining metal-oxide-silicon field effect transistor fringing capacitanceVLSI TECHNOLOGY INC·Filed 1995·Granted Jun 30, 1998·34 cites·18 claims
- 1064US5411906AMethod of fabricating auxiliary gate lightly doped drain (AGLDD) structure with dielectric sidewallsVLSI TECHNOLOGY INC·Filed 1993·Granted May 2, 1995·25 cites·12 claims
- 1162US5340761ASelf-aligned contacts with gate overlapped lightly doped drain (goldd) structureVLSI TECHNOLOGY INC·Filed 1991·Granted Aug 23, 1994·23 cites·10 claims
- 1260US5444003AMethod and structure for creating a self-aligned bicmos-compatible bipolar transistor with a laterally graded emitter structureVLSI TECHNOLOGY INC·Filed 1993·Granted Aug 22, 1995·21 cites·26 claims
- 1357US5227320AMethod for producing gate overlapped lightly doped drain (goldd) structure for submicron transistorVLSI TECHNOLOGY INC·Filed 1991·Granted Jul 13, 1993·20 cites·9 claims
- 1456US5700717AMethod of reducing contact resistance for semiconductor manufacturing processes using tungsten plugsVLSI TECHNOLOGY INC·Filed 1995·Granted Dec 23, 1997·17 cites·22 claims
- 1554US5793094AMethods for fabricating anti-fuse structuresVLSI TECHNOLOGY INC·Filed 1995·Granted Aug 11, 1998·22 cites·21 claims
- 1652US5288652ABICMOS-compatible method for creating a bipolar transistor with laterally graded emitter structureVLSI TECHNOLOGY INC·Filed 1992·Granted Feb 22, 1994·15 cites·45 claims
- 1745US5783467AMethod of making antifuse structures using implantation of both neutral and dopant speciesVLSI TECHNOLOGY INC·Filed 1995·Granted Jul 21, 1998·7 cites·19 claims
- 1845US2010162955A1Systems and methods for substrate processingLEI LAWRENCE CHUNG-LAI·Filed 2008·Application pending·0 cites
- 1937US5753540AApparatus and method for programming antifuse structuresVLSI TECHNOLOGY INC·Filed 1996·Granted May 19, 1998·7 cites·17 claims
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