Inventor · disambiguated record
Russell R. Newcomb
Also filed as: NEWCOMB RUSSELL · NEWCOMB RUSSELL R
17 granted patents·447 citations·filing 1985–2012
94Inventor score
Top patents by PatentIndex Score
17 records- 0195US8638241B28b/9b decoding for reducing crosstalk on a high speed parallel busSUDHAKARAN SUNIL·Filed 2012·Granted Jan 28, 2014·80 cites·20 claims
- 0294US5832411AAutomated network of sensor units for real-time monitoring of compounds in a fluid over a distributed areaRAYTHEON CO·Filed 1997·Granted Nov 3, 1998·245 cites·28 claims
- 0391US7613064B1Power management modes for memory devicesNVIDIA CORP·Filed 2006·Granted Nov 3, 2009·27 cites·19 claims
- 0489US8055871B1Low latency synchronous memory performance switching using update controlNVIDIA CORP·Filed 2007·Granted Nov 8, 2011·20 cites·19 claims
- 0586US7603246B2Data interface calibrationNVIDIA CORP·Filed 2006·Granted Oct 13, 2009·14 cites·25 claims
- 0676US7519893B2Binary data encoding/decoding for parallel busNVIDIA CORP·Filed 2007·Granted Apr 14, 2009·7 cites·20 claims
- 0775US6545707B1Video source with adaptive output to match loadOAK TECHNOLOGY INC·Filed 2000·Granted Apr 8, 2003·16 cites·10 claims
- 0872US7574647B1Binary data encoding/decoding such as for communicating between computing platform components over a parallel interconnectNVIDIA CORP·Filed 2006·Granted Aug 11, 2009·5 cites·21 claims
- 0970US8812892B1Hardware WCK2CK training engine using meta-EDC sweeping and adjustably accurate voting algorithm for clock phase detectionHILL ERIC LYELL·Filed 2009·Granted Aug 19, 2014·4 cites·21 claims
- 1065US8724483B2Loopback configuration for bi-directional interfacesKU TING SHENG·Filed 2007·Granted May 13, 2014·5 cites·18 claims
- 1165US8095761B1Low latency synchronous memory performance switchingSCHULZE HANS WOLFGANG·Filed 2007·Granted Jan 10, 2012·5 cites·18 claims
- 1264US8453019B2Method and system for a free running strobe tolerant interfaceNEWCOMB RUSSELL·Filed 2007·Granted May 28, 2013·4 cites·21 claims
- 1363US8489911B1Hardware WCK2CK training engine using meta-EDC sweeping and adjustably accurate voting algorithm for clock phase detectionHILL ERIC LYELL·Filed 2009·Granted Jul 16, 2013·2 cites·21 claims
- 1462US8095762B1Low latency synchronous memory performance switching with drift refreshSCHULZE HANS WOLFGANG·Filed 2007·Granted Jan 10, 2012·4 cites·20 claims
- 1561US8614634B28b/9b encoding for reducing crosstalk on a high speed parallel busSUDHAKARAN SUNIL·Filed 2012·Granted Dec 24, 2013·1 cites·20 claims
- 1647US7519892B1Binary data encoding/decoding with error detection, such as for communicating between computing platform componentsNVIDIA CORP·Filed 2005·Granted Apr 14, 2009·1 cites·28 claims
- 1741US4668936AUntrimmed 12 bit monotonic all capacitive A to D converterHUGHES AIRCRAFT CO·Filed 1985·Granted May 26, 1987·7 cites·14 claims
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →