Inventor · disambiguated record
Olivier Burg
Also filed as: BURG OLIVIER
9 granted patents·1 pending application·47 citations·filing 2002–2017
85Inventor score
Files withMARVELL WORLD TRADE LTD5BURG OLIVIER2KONINKL PHILIPS ELECTRONICS NV1MARVELL INT LTD1VILLAIN FREDERIC F1
Top patents by PatentIndex Score
10 records- 0191US9740175B2All-digital phase locked loop (ADPLL) including a digital-to-time converter (DTC) and a sampling time-to-digital converter (TDC)MARVELL WORLD TRADE LTD·Filed 2016·Granted Aug 22, 2017·10 cites·20 claims
- 0285US8140044B2Mixer circuit and method of operationVILLAIN FREDERIC F·Filed 2007·Granted Mar 20, 2012·28 cites·16 claims
- 0368US10250264B2Multiplying delay-locked loop using sampling time-to-digital converterMARVELL WORLD TRADE LTD·Filed 2017·Granted Apr 2, 2019·2 cites·20 claims
- 0464US8710884B2Methods and devices for multiple-mode radio frequency synthesizersBURG OLIVIER·Filed 2012·Granted Apr 29, 2014·2 cites·18 claims
- 0563US9391624B1Method and apparatus for avoiding dead zone effects in digital phase locked loopsMARVELL INT LTD·Filed 2015·Granted Jul 12, 2016·2 cites·18 claims
- 0657US9036763B2Methods and devices for implementing all-digital phase locked loopBURG OLIVIER·Filed 2012·Granted May 19, 2015·1 cites·13 claims
- 0750US6801081B2Switching device provided with integrated test meansKONINKL PHILIPS ELECTRONICS NV·Filed 2002·Granted Oct 5, 2004·2 cites·7 claims
- 0848US8957713B2Methods and devices for multiple-mode radio frequency synthesizersMARVELL WORLD TRADE LTD·Filed 2014·Granted Feb 17, 2015·0 cites·18 claims
- 0945US9306586B2Methods and devices for implementing all-digital phase locked loopMARVELL WORLD TRADE LTD·Filed 2015·Granted Apr 5, 2016·0 cites·18 claims
- 1038US2017366376A1Analog fractional-n phase-locked loopMARVELL WORLD TRADE LTD·Filed 2017·Application pending·0 cites
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