Inventor · disambiguated record
Shiv Kaushik
Also filed as: KAUSHIK SHIV
7 granted patents·3 pending applications·244 citations·filing 2001–2014
86Inventor score
Top patents by PatentIndex Score
10 records- 0195US7363474B2Method and apparatus for suspending execution of a thread until a specified memory access occursINTEL CORP·Filed 2001·Granted Apr 22, 2008·104 cites·18 claims
- 0293US7127561B2Coherency techniques for suspending execution of a thread until a specified memory access occursINTEL CORP·Filed 2001·Granted Oct 24, 2006·95 cites·36 claims
- 0385US7917789B2System and method for selecting optimal processor performance levels by using processor hardware feedback mechanismsINTEL CORP·Filed 2007·Granted Mar 29, 2011·15 cites·21 claims
- 0478US7810083B2Mechanism to emulate user-level multithreading on an OS-sequestered sequencerINTEL CORP·Filed 2004·Granted Oct 5, 2010·25 cites·37 claims
- 0566US8914618B2Instruction set architecture-based inter-sequencer communications with a heterogeneous resourceWANG HONG·Filed 2005·Granted Dec 16, 2014·3 cites·10 claims
- 0664US9459874B2Instruction set architecture-based inter-sequencer communications with a heterogeneous resourceINTEL CORP·Filed 2014·Granted Oct 4, 2016·1 cites·18 claims
- 0763US9588771B2Instruction set architecture-based inter-sequencer communications with a heterogeneous resourceINTEL CORP·Filed 2013·Granted Mar 7, 2017·1 cites·18 claims
- 0851US2008034190A1Method and apparatus for suspending execution of a thread until a specified memory access occursRODGERS DION·Filed 2007·Application pending·0 cites
- 0942US2003126416A1Suspending execution of a thread in a multi-threaded processorFiled 2001·Application pending·0 cites
- 1042US2003126379A1Instruction sequences for suspending execution of a thread until a specified memory access occursFiled 2001·Application pending·0 cites
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