Inventor · disambiguated record
Edward T. Malley
Also filed as: MALLEY EDWARD · MALLEY EDWARD T · MALLEY EDWARD THOMAS
29 granted patents·2 pending applications·22 citations·filing 2002–2025
93Inventor score
Top patents by PatentIndex Score
31 records- 0194US11556474B1Integrated semi-inclusive hierarchical metadata predictorIBM·Filed 2021·Granted Jan 17, 2023·5 cites·17 claims
- 0281US10929142B2Making precise operand-store-compare predictions to avoid false dependenciesIBM·Filed 2019·Granted Feb 23, 2021·3 cites·19 claims
- 0380US11868779B2Updating metadata prediction tables using a reprediction pipelineIBM·Filed 2021·Granted Jan 9, 2024·1 cites·20 claims
- 0475US2025278278A1Branch prediction using speculative indexing and intraline countIBM·Filed 2025·Application pending·0 cites
- 0570US11108567B2Compute digital signature authentication verify instructionIBM·Filed 2019·Granted Aug 31, 2021·1 cites·20 claims
- 0669US11075763B2Compute digital signature authentication sign with encrypted key instructionIBM·Filed 2019·Granted Jul 27, 2021·1 cites·20 claims
- 0769US9389865B1Accelerated execution of target of execute instructionIBM·Filed 2015·Granted Jul 12, 2016·1 cites·1 claims
- 0867US12327122B2Branch prediction using speculative indexing and intraline countIBM·Filed 2022·Granted Jun 10, 2025·0 cites·15 claims
- 0961US7949972B2Method, system and computer program product for exploiting orthogonal control vectors in timing driven synthesisIBM·Filed 2008·Granted May 24, 2011·2 cites·20 claims
- 1060US10540183B2Accelerated execution of execute instruction targetIBM·Filed 2017·Granted Jan 21, 2020·0 cites·16 claims
- 1156US11928471B2Metadata predictorIBM·Filed 2021·Granted Mar 12, 2024·0 cites·20 claims
- 1254US9875107B2Accelerated execution of execute instruction targetIBM·Filed 2015·Granted Jan 23, 2018·0 cites·16 claims
- 1354US9710278B2Optimizing grouping of instructionsIBM·Filed 2014·Granted Jul 18, 2017·0 cites·12 claims
- 1453US11663126B1Return address table branch predictorIBM·Filed 2022·Granted May 30, 2023·0 cites·20 claims
- 1553US6882205B2Low power overdriven pass gate latchIBM·Filed 2002·Granted Apr 19, 2005·3 cites·10 claims
- 1652US10365928B2Suppress unnecessary mapping for scratch registerIBM·Filed 2017·Granted Jul 30, 2019·0 cites·17 claims
- 1751US6768365B2Low power reduced voltage swing latchIBM·Filed 2002·Granted Jul 27, 2004·2 cites·5 claims
- 1850US11157240B2Perform cryptographic computation scalar multiply instructionIBM·Filed 2019·Granted Oct 26, 2021·0 cites·20 claims
- 1950US2013339666A1Special case register update without executionALEXANDER GREGORY W·Filed 2012·Application pending·0 cites
- 2049US9766896B2Optimizing grouping of instructionsIBM·Filed 2015·Granted Sep 19, 2017·0 cites·7 claims
- 2148US11243774B2Dynamic selection of OSC hazard avoidance mechanismIBM·Filed 2019·Granted Feb 8, 2022·0 cites·17 claims
- 2248US7962726B2Recycling long multi-operand instructionsIBM·Filed 2008·Granted Jun 14, 2011·0 cites·11 claims
- 2347US11303456B2Compute digital signature authentication sign instructionIBM·Filed 2019·Granted Apr 12, 2022·0 cites·20 claims
- 2447US7921279B2Operand and result forwarding between differently sized operands in a superscalar processorIBM·Filed 2008·Granted Apr 5, 2011·0 cites·16 claims
- 2546US11144367B2Write power optimization for hardware employing pipe-based duplicate register filesIBM·Filed 2019·Granted Oct 12, 2021·0 cites·5 claims
- 2646US11113055B2Store instruction to store instruction dependencyIBM·Filed 2019·Granted Sep 7, 2021·0 cites·17 claims
- 2746US10599431B2Managing backend resources via frontend steering or stallsIBM·Filed 2017·Granted Mar 24, 2020·0 cites·18 claims
- 2846US6657471B1High performance, low power differential latchIBM·Filed 2002·Granted Dec 2, 2003·3 cites·7 claims
- 2943US11175923B2Comparing load instruction address fields to store instruction address fields in a table to delay issuing dependent load instructionsIBM·Filed 2017·Granted Nov 16, 2021·0 cites·4 claims
- 3042US9201655B2Method, computer program product, and hardware product for eliminating or reducing operand line crossing penaltyKAPADIA VIMAL M·Filed 2008·Granted Dec 1, 2015·0 cites·20 claims
- 3139US9971601B2Dynamic assignment across dispatch pipes of source ports to be used to obtain indication of physical registersIBM·Filed 2015·Granted May 15, 2018·0 cites·20 claims
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →