Inventor · disambiguated record
Wai-Yan Ho
Also filed as: HO WAI-YAN
5 granted patents·867 citations·filing 1994–1997
87Inventor score
Technology areasG06F
Top patents by PatentIndex Score
5 records- 0195US6009251AMethod and system for layout verification of an integrated circuit design with reusable subdesignsSYNOPSYS INC·Filed 1997·Granted Dec 28, 1999·454 cites·22 claims
- 0290US6011911ALayout overlap detection with selective flattening in computer implemented integrated circuit designSYNOPSYS INC·Filed 1997·Granted Jan 4, 2000·198 cites·18 claims
- 0383US6009250ASelective flattening in layout areas in computer implemented integrated circuit designSYNOPSYS INC·Filed 1997·Granted Dec 28, 1999·124 cites·20 claims
- 0472US5581742AApparatus and method for emulating a microelectronic device by interconnecting and running test vectors on physically implemented functional modulesSEIKO EPSON CORP·Filed 1994·Granted Dec 3, 1996·51 cites·18 claims
- 0567US5581562AIntegrated circuit device implemented using a plurality of partially defective integrated circuit chipsSEIKO EPSON CORP·Filed 1994·Granted Dec 3, 1996·40 cites·13 claims
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