Inventor · disambiguated record
Michael Catherwood
Also filed as: CATHERWOOD MICHAEL · CATHERWOOD MICHAEL I
35 granted patents·11 pending applications·307 citations·filing 1990–2024
97Inventor score
Top patents by PatentIndex Score
46 records- 0183US10248521B2Run time ECC error injection scheme for hardware validationMICROCHIP TECH INC·Filed 2016·Granted Apr 2, 2019·6 cites·18 claims
- 0278US7966480B2Register pointer trap to prevent errors due to an invalid pointer value in a registerMICROCHIP TECH INC·Filed 2004·Granted Jun 21, 2011·21 cites·26 claims
- 0378US6728856B2Modified Harvard architecture processor having program memory space mapped to data memory spaceMICROCHIP TECH INC·Filed 2001·Granted Apr 27, 2004·29 cites·13 claims
- 0476US6976158B2Repeat instruction with interruptMICROCHIP TECH INC·Filed 2001·Granted Dec 13, 2005·22 cites·15 claims
- 0575US8495125B2DSP engine with implicit mixed sign operandsCATHERWOOD MICHAEL I·Filed 2010·Granted Jul 23, 2013·8 cites·29 claims
- 0669US12093688B2Multibit shift instructionMICROCHIP TECH INC·Filed 2022·Granted Sep 17, 2024·0 cites·20 claims
- 0768US8856406B2Peripheral trigger generatorKRIS BRYAN·Filed 2012·Granted Oct 7, 2014·2 cites·24 claims
- 0866US9619231B2Programmable CPU register hardware context swap mechanismMICROCHIP TECH INC·Filed 2014·Granted Apr 11, 2017·2 cites·27 claims
- 0965US9858083B2Dual boot panel SWAP mechanismMICROCHIP TECH INC·Filed 2014·Granted Jan 2, 2018·2 cites·32 claims
- 1064US8984198B2Data space arbiterCATHERWOOD MICHAEL I·Filed 2010·Granted Mar 17, 2015·2 cites·21 claims
- 1164US2023176866A1Multibit shift instructionMICROCHIP TECH INC·Filed 2022·Application pending·0 cites
- 1263US12393429B2Atomic instruction set and architecture with bus arbitration lockingMICROCHIP TECH INC·Filed 2023·Granted Aug 19, 2025·0 cites·20 claims
- 1363US8645729B2External device power control during low power sleep mode without central processing unit interventionSIMMONS MICHAEL·Filed 2010·Granted Feb 4, 2014·1 cites·31 claims
- 1463US5890191AMethod and apparatus for providing erasing and programming protection for electrically erasable programmable read only memoryMOTOROLA INC·Filed 1996·Granted Mar 30, 1999·24 cites·16 claims
- 1562US12001270B2Vector fetch bus error handlingMICROCHIP TECH INC·Filed 2022·Granted Jun 4, 2024·0 cites·17 claims
- 1661US7020788B2Reduced power optionMICROCHIP TECH INC·Filed 2001·Granted Mar 28, 2006·7 cites·33 claims
- 1761US5854944AMethod and apparatus for determining wait states on a per cycle basis in a data processing systemMOTOROLA INC·Filed 1996·Granted Dec 29, 1998·49 cites·22 claims
- 1860US12346722B2Systems and methods for managing interrupt priority levelsMICROCHIP TECH INC·Filed 2022·Granted Jul 1, 2025·0 cites·20 claims
- 1959US10776292B2Apparatus and method for protecting program memory for processing cores in a multi-core integrated circuitMICROCHIP TECH INC·Filed 2019·Granted Sep 15, 2020·0 cites·50 claims
- 2059US8688964B2Programmable exception processing latencyCATHERWOOD MICHAEL I·Filed 2010·Granted Apr 1, 2014·1 cites·22 claims
- 2159US2025251966A1Os context switchingMICROCHIP TECH INC·Filed 2024·Application pending·0 cites
- 2257US6604169B2Modulo addressing based on absolute offsetMICROCHIP TECH INC·Filed 2001·Granted Aug 5, 2003·5 cites·18 claims
- 2357US5249280AMicrocomputer having a memory bank switching apparatus for accessing a selected memory bank in an external memoryMOTOROLA INC·Filed 1990·Granted Sep 28, 1993·33 cites·14 claims
- 2455US7007172B2Modified Harvard architecture processor having data memory space mapped to program memory space with erroneous execution protectionMICROCHIP TECH INC·Filed 2001·Granted Feb 28, 2006·3 cites·6 claims
- 2553US6601160B2Dynamically reconfigurable data spaceMICROCHIP TECH INC·Filed 2001·Granted Jul 29, 2003·4 cites·15 claims
- 2652US10983931B2Central processing unit with enhanced instruction setMICROCHIP TECH INC·Filed 2016·Granted Apr 20, 2021·0 cites·45 claims
- 2752US5249148AMethod and apparatus for performing restricted modulo arithmeticMOTOROLA INC·Filed 1990·Granted Sep 28, 1993·30 cites·19 claims
- 2850US6934728B2Euclidean distance instructionsMICROCHIP TECH INC·Filed 2001·Granted Aug 23, 2005·1 cites·22 claims
- 2949US7243372B2Modified Harvard architecture processor having data memory space mapped to program memory space with erroneous execution protectionMICROCHIP TECH INC·Filed 2005·Granted Jul 10, 2007·0 cites·10 claims
- 3047US10120815B2Configurable mailbox data buffer apparatusMICROCHIP TECH INC·Filed 2016·Granted Nov 6, 2018·0 cites·26 claims
- 3147US5680632AMethod for providing an extensible register in the first and second data processing systemsMOTOROLA INC·Filed 1992·Granted Oct 21, 1997·18 cites·39 claims
- 3245US10802866B2Central processing unit with DSP engine and enhanced context switch capabilitiesMICROCHIP TECH INC·Filed 2016·Granted Oct 13, 2020·0 cites·30 claims
- 3344US6952711B2Maximally negative signed fractional number multiplicationMICROCHIP TECH INC·Filed 2001·Granted Oct 4, 2005·0 cites·28 claims
- 3444US2005166036A1Microcontroller instruction setMICROCHIP TECH INC·Filed 2004·Application pending·0 cites
- 3543US2002184566A1Register pointer trapFiled 2001·Application pending·0 cites
- 3642US7467178B2Dual mode arithmetic saturation processingMICROCHIP TECH INC·Filed 2001·Granted Dec 16, 2008·0 cites·4 claims
- 3741US2003028696A1Low overhead interruptFiled 2001·Application pending·0 cites
- 3841US2003023836A1Shadow register array control instructionsFiled 2001·Application pending·0 cites
- 3941US2003005268A1Find first bit value instructionFiled 2001·Application pending·0 cites
- 4040US5457802AIntegrated circuit pin control apparatus and method thereof in a data processing systemMOTOROLA INC·Filed 1993·Granted Oct 10, 1995·14 cites·17 claims
- 4139US5535376AData processor having a timer circuit for performing a buffered pulse width modulation function and method thereforMOTOROLA INC·Filed 1993·Granted Jul 9, 1996·17 cites·15 claims
- 4239US2003005254A1Compatible effective addressing with a dynamically reconfigurable data space word widthFiled 2001·Application pending·0 cites
- 4339US2002188830A1Bit replacement and extraction instructionsFiled 2001·Application pending·0 cites
- 4438US2003061464A1Digital signal controller instruction set and architectureFiled 2001·Application pending·0 cites
- 4537US5598569AData processor having operating modes selected by at least one mask option bit and method thereforMOTOROLA INC·Filed 1994·Granted Jan 28, 1997·6 cites·14 claims
- 4637US2003005269A1Multi-precision barrel shiftingFiled 2001·Application pending·0 cites
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →