Inventor · disambiguated record
Maurice B. Steinman
Also filed as: STEINMAN MAURICE · STEINMAN MAURICE B · STEINMAN MAURICE BENNET
67 granted patents·4 pending applications·1,108 citations·filing 1989–2025
99Inventor score
Files withADVANCED MICRO DEVICES INC13BRANOVER ALEXANDER13HEWLETT PACKARD DEVELOPMENT CO9LIGHTELLIGENCE INC9LIGHTELLIGENCE PTE LTD7
Top patents by PatentIndex Score
71 records- 0197US11281972B2Optoelectronic computing systemsLIGHTELLIGENCE INC·Filed 2020·Granted Mar 22, 2022·40 cites·30 claims
- 0297US8156362B2Hardware monitoring and decision making for transitioning in and out of low-power stateBRANOVER ALEXANDER·Filed 2008·Granted Apr 10, 2012·76 cites·33 claims
- 0395US11734556B2Optoelectronic computing systemsLIGHTELLIGENCE INC·Filed 2021·Granted Aug 22, 2023·10 cites·40 claims
- 0494US12073315B2Optoelectronic computing systemsLIGHTELLIGENCE PTE LTD·Filed 2023·Granted Aug 27, 2024·3 cites·29 claims
- 0594US8656198B2Method and apparatus for memory power managementBRANOVER ALEXANDER·Filed 2010·Granted Feb 18, 2014·38 cites·24 claims
- 0693US11507818B2Optoelectronic computing systemsLIGHTELLIGENCE INC·Filed 2019·Granted Nov 22, 2022·22 cites·16 claims
- 0793US6704817B1Computer architecture and system for efficient management of bi-directional busHEWLETT PACKARD DEVELOPMENT CO·Filed 2000·Granted Mar 9, 2004·74 cites·32 claims
- 0892US11907832B2Optoelectronic computing systemsLIGHTELLIGENCE INC·Filed 2020·Granted Feb 20, 2024·3 cites·48 claims
- 0992US11853871B2Optoelectronic computing systemsLIGHTELLIGENCE PTE LTD·Filed 2022·Granted Dec 26, 2023·4 cites·34 claims
- 1092US8412971B2Method and apparatus for cache controlBRANOVER ALEXANDER·Filed 2010·Granted Apr 2, 2013·18 cites·28 claims
- 1192US7200770B2Restoring access to a failed data storage device in a redundant memory systemHEWLETT PACKARD DEVELOPMENT CO·Filed 2003·Granted Apr 3, 2007·71 cites·34 claims
- 1292US6622225B1System for minimizing memory bank conflicts in a computer systemHEWLETT PACKARD DEVELOPMENT CO·Filed 2000·Granted Sep 16, 2003·83 cites·28 claims
- 1391US8924758B2Method for SOC performance and power optimizationSTEINMAN MAURICE B·Filed 2012·Granted Dec 30, 2014·21 cites·17 claims
- 1491US8484498B2Method and apparatus for demand-based control of processing node performanceBRANOVER ALEXANDER·Filed 2010·Granted Jul 9, 2013·15 cites·30 claims
- 1591US8112648B2Enhanced control of CPU parking and thread rescheduling for maximizing the benefits of low-power stateBRANOVER ALEXANDER·Filed 2008·Granted Feb 7, 2012·29 cites·20 claims
- 1691US6591349B1Mechanism to reorder memory read and write transactions for reduced latency and increased bandwidthHEWLETT PACKARD DEVELOPMENT CO·Filed 2000·Granted Jul 8, 2003·67 cites·28 claims
- 1791US6353877B1Performance optimization and system bus duty cycle reduction by I/O bridge partial cache line writeCOMPAQ COMPUTER CORP·Filed 2000·Granted Mar 5, 2002·70 cites·14 claims
- 1888US12001946B2Optoelectronic computing systemsLIGHTELLIGENCE INC·Filed 2020·Granted Jun 4, 2024·2 cites·30 claims
- 1988US6754739B1Computer resource management and allocation systemHEWLETT PACKARD DEVELOPMENT CO·Filed 2000·Granted Jun 22, 2004·50 cites·28 claims
- 2087US8112647B2Protocol for power state determination and demotionBRANOVER ALEXANDER·Filed 2008·Granted Feb 7, 2012·17 cites·36 claims
- 2185US11734555B2Optoelectronic computing systemsLIGHTELLIGENCE INC·Filed 2019·Granted Aug 22, 2023·3 cites·115 claims
- 2285US8862920B2Power state management of an input/output servicing component of a processor systemBRANOVER ALEXANDER·Filed 2011·Granted Oct 14, 2014·8 cites·17 claims
- 2385US8832485B2Method and apparatus for cache controlADVANCED MICRO DEVICES INC·Filed 2013·Granted Sep 9, 2014·7 cites·31 claims
- 2484US12293282B2Optoelectronic computing systemsLIGHTELLIGENCE PTE LTD·Filed 2024·Granted May 6, 2025·0 cites·56 claims
- 2583US11686955B2Optoelectronic computing platformLIGHTELLIGENCE INC·Filed 2021·Granted Jun 27, 2023·1 cites·61 claims
- 2683US7750912B2Integrating display controller into low power processorADVANCED MICRO DEVICES INC·Filed 2005·Granted Jul 6, 2010·13 cites·17 claims
- 2782US8566628B2North-bridge to south-bridge protocol for placing processor in low power stateBRANOVER ALEXANDER·Filed 2009·Granted Oct 22, 2013·13 cites·24 claims
- 2882US8291249B2Method and apparatus for transitioning devices between power states based on activity request frequencyBRANOVER ALEXANDER·Filed 2009·Granted Oct 16, 2012·11 cites·24 claims
- 2982US8135935B2ECC implementation in non-ECC componentsHAERTEL MICHAEL JOHN·Filed 2007·Granted Mar 13, 2012·18 cites·14 claims
- 3081US4995041AWrite back buffer with error correcting capabilitiesDIGITAL EQUIPMENT CORP·Filed 1989·Granted Feb 19, 1991·68 cites·17 claims
- 3180US7941683B2Data processing device with low-power cache access modeADVANCED MICRO DEVICES INC·Filed 2007·Granted May 10, 2011·12 cites·20 claims
- 3279US10671722B2Mechanism for throttling untrusted interconnect agentsADVANCED MICRO DEVICES INC·Filed 2016·Granted Jun 2, 2020·2 cites·19 claims
- 3379US8966305B2Managing processor-state transitionsBRANOVER ALEXANDER·Filed 2011·Granted Feb 24, 2015·5 cites·18 claims
- 3478US7957428B2Methods and apparatuses to effect a variable-width linkINTEL CORP·Filed 2004·Granted Jun 7, 2011·26 cites·25 claims
- 3578US7568118B2Deterministic operation of an input/output interfaceINTEL CORP·Filed 2005·Granted Jul 28, 2009·8 cites·21 claims
- 3677US7870407B2Dynamic processor power management device and method thereofADVANCED MICRO DEVICES INC·Filed 2007·Granted Jan 11, 2011·11 cites·17 claims
- 3777US7856562B2Selective deactivation of processor cores in multiple processor core systemsADVANCED MICRO DEVICES INC·Filed 2007·Granted Dec 21, 2010·8 cites·18 claims
- 3877US2025259049A1Optoelectronic computing systemsLIGHTELLIGENCE PTE LTD·Filed 2025·Application pending·0 cites
- 3976US12025862B2Optical modulation for optoelectronic processingLIGHTELLIGENCE PTE LTD·Filed 2020·Granted Jul 2, 2024·1 cites·37 claims
- 4076US11687767B2Optoelectronic computing systemsLIGHTELLIGENCE PTE LTD·Filed 2022·Granted Jun 27, 2023·0 cites·30 claims
- 4176US6636955B1Mechanism for synchronizing multiple skewed source-synchronous data channels with automatic initialization featureHEWLETT PACKARD DEVELOPMENT CO·Filed 2000·Granted Oct 21, 2003·21 cites·5 claims
- 4276US6546453B1Proprammable DRAM address mapping mechanismCOMPAQ INFORMATION TECHNOLOGIE·Filed 2000·Granted Apr 8, 2003·23 cites·7 claims
- 4375US9021209B2Cache flush based on idle prediction and probe activity levelBRANOVER ALEXANDER·Filed 2010·Granted Apr 28, 2015·3 cites·20 claims
- 4474US10635588B2Distributed coherence directory subsystem with exclusive data regionsADVANCED MICRO DEVICES INC·Filed 2018·Granted Apr 28, 2020·1 cites·27 claims
- 4573US12210964B2Optoelectronic computing systemsLIGHTELLIGENCE PTE LTD·Filed 2023·Granted Jan 28, 2025·0 cites·27 claims
- 4673US9261949B2Method for adaptive performance optimization of the socADVANCED MICRO DEVICES INC·Filed 2013·Granted Feb 16, 2016·3 cites·20 claims
- 4772US9423847B2Method and apparatus for transitioning a system to an active disconnect stateBRANOVER ALEXANDER J·Filed 2011·Granted Aug 23, 2016·4 cites·25 claims
- 4872US8176352B2Clock domain data transfer device and methods thereofGILLESPIE KEVIN·Filed 2008·Granted May 8, 2012·9 cites·13 claims
- 4972US6662265B1Mechanism to track all open pages in a DRAM memory systemHEWLETT PACKARD DEVELOPMENT CO·Filed 2000·Granted Dec 9, 2003·17 cites·9 claims
- 5071US8266389B2Hierarchical memory arbitration technique for disparate sourcesKRISHNAN GUHAN·Filed 2009·Granted Sep 11, 2012·5 cites·24 claims
Showing the top 50 of 71 patent records by PatentIndex Score.
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