Inventor · disambiguated record
Vasisht Mantra Vadi
Also filed as: VADI VASISHT · VADI VASISHT M · VADI VASISHT MANTRA
41 granted patents·2 pending applications·891 citations·filing 2002–2023
98Inventor score
Top patents by PatentIndex Score
43 records- 0197US7233169B1Bidirectional register segmented data busingXILINX INC·Filed 2005·Granted Jun 19, 2007·68 cites·18 claims
- 0297US7126372B2Reconfiguration port for dynamic reconfiguration—sub-frame access for reconfigurationXILINX INC·Filed 2004·Granted Oct 24, 2006·151 cites·18 claims
- 0396US7218137B2Reconfiguration port for dynamic reconfigurationXILINX INC·Filed 2004·Granted May 15, 2007·100 cites·31 claims
- 0495US11901294B2Applications of buried power railsSAMSUNG ELECTRONICS CO LTD·Filed 2021·Granted Feb 13, 2024·2 cites·20 claims
- 0595US7129762B1Efficient implementation of a bypassable flip-flop with a clock enableXILINX INC·Filed 2005·Granted Oct 31, 2006·34 cites·10 claims
- 0693US11195797B2Applications of buried power railsSAMSUNG ELECTRONICS CO LTD·Filed 2019·Granted Dec 7, 2021·7 cites·20 claims
- 0793US7394708B1Adjustable global tap voltage to improve memory cell yieldXILINX INC·Filed 2005·Granted Jul 1, 2008·33 cites·20 claims
- 0893US7283409B1Data monitoring for single event upset in a programmable logic deviceXILINX INC·Filed 2006·Granted Oct 16, 2007·22 cites·11 claims
- 0993US6975145B1Glitchless dynamic multiplexer with synchronous and asynchronous controlsXILINX INC·Filed 2003·Granted Dec 13, 2005·69 cites·18 claims
- 1091US7882165B2Digital signal processing element having an arithmetic logic unitXILINX INC·Filed 2006·Granted Feb 1, 2011·25 cites·19 claims
- 1184US7870182B2Digital signal processing circuit having an adder circuit with carry-outsXILINX INC·Filed 2006·Granted Jan 11, 2011·21 cites·20 claims
- 1284US7233532B2Reconfiguration port for dynamic reconfiguration-system monitor interfaceXILINX INC·Filed 2004·Granted Jun 19, 2007·26 cites·23 claims
- 1383US8001171B1Pipeline FFT architecture for a programmable deviceXILINX INC·Filed 2006·Granted Aug 16, 2011·16 cites·20 claims
- 1482US7840630B2Arithmetic logic unit circuitXILINX INC·Filed 2006·Granted Nov 23, 2010·17 cites·20 claims
- 1582US7071756B1Clock multiplexing systemXILINX INC·Filed 2004·Granted Jul 4, 2006·20 cites·15 claims
- 1681US8117577B1Determining timing paths within a circuit block of a programmable integrated circuitVADI VASISHT M·Filed 2009·Granted Feb 14, 2012·16 cites·20 claims
- 1780US7865542B2Digital signal processing block having a wide multiplexerXILINX INC·Filed 2006·Granted Jan 4, 2011·16 cites·16 claims
- 1880US7518401B2Differential clock tree in an integrated circuitXILINX INC·Filed 2006·Granted Apr 14, 2009·7 cites·15 claims
- 1979US7414430B2Programmable logic device having an embedded differential clock treeXILINX INC·Filed 2006·Granted Aug 19, 2008·7 cites·7 claims
- 2078US7759973B1Integrated circuit having embedded differential clock treeXILINX INC·Filed 2008·Granted Jul 20, 2010·6 cites·16 claims
- 2178US7187709B1High speed configurable transceiver architectureXILINX INC·Filed 2002·Granted Mar 6, 2007·27 cites·17 claims
- 2278US6911842B1Low jitter clock for a physical media access sublayer on a field programmable gate arrayXILINX INC·Filed 2002·Granted Jun 28, 2005·24 cites·58 claims
- 2377US7853632B2Architectural floorplan for a digital signal processing circuitXILINX INC·Filed 2006·Granted Dec 14, 2010·12 cites·20 claims
- 2477US7849119B2Digital signal processing circuit having a pattern detector circuitXILINX INC·Filed 2006·Granted Dec 7, 2010·12 cites·19 claims
- 2575US7860915B2Digital signal processing circuit having a pattern circuit for determining termination conditionsXILINX INC·Filed 2006·Granted Dec 28, 2010·11 cites·16 claims
- 2675US7844653B2Digital signal processing circuit having a pre-adder circuitXILINX INC·Filed 2006·Granted Nov 30, 2010·11 cites·18 claims
- 2775US7109750B2Reconfiguration port for dynamic reconfiguration-controllerXILINX INC·Filed 2004·Granted Sep 19, 2006·17 cites·35 claims
- 2874US7853634B2Digital signal processing circuit having a SIMD circuitXILINX INC·Filed 2006·Granted Dec 14, 2010·10 cites·20 claims
- 2974US7853636B2Digital signal processing circuit having a pattern detector circuit for convergent roundingXILINX INC·Filed 2006·Granted Dec 14, 2010·10 cites·20 claims
- 3073US7286382B1Segmented dataline scheme in a memory with enhanced full fault coverage memory cell testabilityXILINX INC·Filed 2006·Granted Oct 23, 2007·7 cites·5 claims
- 3172US7372299B2Differential clock tree in an integrated circuitXILINX INC·Filed 2006·Granted May 13, 2008·4 cites·20 claims
- 3272US7129765B2Differential clock tree in an integrated circuitXILINX INC·Filed 2004·Granted Oct 31, 2006·13 cites·14 claims
- 3371US7314174B1Method and system for configuring an integrated circuitXILINX INC·Filed 2004·Granted Jan 1, 2008·14 cites·16 claims
- 3470US10032763B2Bulk cross-coupled high density power supply decoupling capacitorQUALCOMM INC·Filed 2016·Granted Jul 24, 2018·2 cites·27 claims
- 3570US7840627B2Digital signal processing circuit having input register blocksXILINX INC·Filed 2006·Granted Nov 23, 2010·8 cites·19 claims
- 3670US7126406B2Programmable logic device having an embedded differential clock treeXILINX INC·Filed 2004·Granted Oct 24, 2006·11 cites·22 claims
- 3766US7196940B1Method and apparatus for a multiplexed address line driverXILINX INC·Filed 2004·Granted Mar 27, 2007·14 cites·17 claims
- 3864US8543635B2Digital signal processing block with preadder stageSIMKINS JAMES M·Filed 2009·Granted Sep 24, 2013·4 cites·20 claims
- 3962US7109746B1Data monitoring for single event upset in a programmable logic deviceXILINX INC·Filed 2004·Granted Sep 19, 2006·8 cites·14 claims
- 4060US7142442B1Segmented dataline scheme in a memory with enhanced full fault coverage memory cell testabilityXILINX INC·Filed 2004·Granted Nov 28, 2006·9 cites·39 claims
- 4155US2024332278A1Routability improvement for an ultra-high dense standard cell architectureQUALCOMM INC·Filed 2023·Application pending·0 cites
- 4248US10505541B2High-voltage tolerant level shifter using thin-oxide transistors and a middle-of-the-line (MOL) capacitorQUALCOMM INC·Filed 2017·Granted Dec 10, 2019·0 cites·24 claims
- 4341US2020106426A1Area efficient flop for usage in sdb based libraries and low voltage applicationsSAMSUNG ELECTRONICS CO LTD·Filed 2019·Application pending·0 cites
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