Inventor · disambiguated record
Michael A. Blake
Also filed as: BLAKE MICHAEL · BLAKE MICHAEL A · BLAKE MICHAEL ANDREW
59 granted patents·7 pending applications·820 citations·filing 1996–2022
98Inventor score
Technology areasG06F
Top patents by PatentIndex Score
66 records- 0196US7111130B2Coherency management for a “switchless” distributed shared memory computer systemIBM·Filed 2006·Granted Sep 19, 2006·85 cites·5 claims
- 0291US6038651ASMP clusters with remote resource managers for distributing work to other clusters while reducing bus traffic to a minimumIBM·Filed 1998·Granted Mar 14, 2000·188 cites·20 claims
- 0390US6738870B2High speed remote storage controllerIBM·Filed 2000·Granted May 18, 2004·68 cites·4 claims
- 0489US6738872B2Clustered computer system with deadlock avoidanceIBM·Filed 2000·Granted May 18, 2004·59 cites·5 claims
- 0588US10055355B1Non-disruptive clearing of varying address ranges from cacheIBM·Filed 2017·Granted Aug 21, 2018·4 cites·1 claims
- 0687US10339064B2Hot cache line arbitrationIBM·Filed 2017·Granted Jul 2, 2019·5 cites·20 claims
- 0787US9507660B2Eliminate corrupted portions of cache during runtimeIBM·Filed 2016·Granted Nov 29, 2016·4 cites·1 claims
- 0886US8423736B2Maintaining cache coherence in a multi-node, symmetric multiprocessing computerBLAKE MICHAEL A·Filed 2010·Granted Apr 16, 2013·10 cites·18 claims
- 0985US6988173B2Bus protocol for a switchless distributed shared memory computer systemIBM·Filed 2003·Granted Jan 17, 2006·49 cites·22 claims
- 1085US6738871B2Method for deadlock avoidance in a cluster environmentIBM·Filed 2000·Granted May 18, 2004·42 cites·6 claims
- 1185US5752264AComputer architecture incorporating processor clusters and hierarchical cache memoriesIBM·Filed 1996·Granted May 12, 1998·135 cites·26 claims
- 1283US10628313B2Dual clusters of fully connected integrated circuit multiprocessors with shared high-level cacheIBM·Filed 2017·Granted Apr 21, 2020·3 cites·8 claims
- 1383US9703661B2Eliminate corrupted portions of cache during runtimeIBM·Filed 2015·Granted Jul 11, 2017·3 cites·14 claims
- 1483US9244851B2Cache coherency protocol for allowing parallel data fetches and eviction to the same addressable indexIBM·Filed 2013·Granted Jan 26, 2016·6 cites·6 claims
- 1582US10489294B2Hot cache line fairness arbitration in distributed modular SMP systemIBM·Filed 2017·Granted Nov 26, 2019·3 cites·18 claims
- 1682US8918587B2Multilevel cache hierarchy for finding a cache line on a remote nodeBRONSON TIMOTHY C·Filed 2012·Granted Dec 23, 2014·6 cites·13 claims
- 1782US7085897B2Memory management for a symmetric multiprocessor computer systemIBM·Filed 2003·Granted Aug 1, 2006·34 cites·22 claims
- 1879US10628314B2Dual clusters of fully connected integrated circuit multiprocessors with shared high-level cacheIBM·Filed 2017·Granted Apr 21, 2020·2 cites·6 claims
- 1978US10649908B2Non-disruptive clearing of varying address ranges from cacheIBM·Filed 2019·Granted May 12, 2020·1 cites·17 claims
- 2077US10915461B2Multilevel cache eviction managementIBM·Filed 2019·Granted Feb 9, 2021·2 cites·14 claims
- 2177US10802966B2Simultaneous, non-atomic request processing within an SMP environment broadcast scope for multiply-requested data elements using real-time parallelizationIBM·Filed 2019·Granted Oct 13, 2020·2 cites·20 claims
- 2277US7085898B2Coherency management for a “switchless” distributed shared memory computer systemIBM·Filed 2003·Granted Aug 1, 2006·21 cites·22 claims
- 2375US10437729B2Non-disruptive clearing of varying address ranges from cacheIBM·Filed 2017·Granted Oct 8, 2019·1 cites·12 claims
- 2475US9003127B2Storing data in a system memory for a subsequent cache flushIBM·Filed 2013·Granted Apr 7, 2015·3 cites·9 claims
- 2575US8364904B2Horizontal cache persistence in a multi-compute node, symmetric multiprocessing computerIBM·Filed 2010·Granted Jan 29, 2013·4 cites·24 claims
- 2674US8762651B2Maintaining cache coherence in a multi-node, symmetric multiprocessing computerBLAKE MICHAEL A·Filed 2010·Granted Jun 24, 2014·4 cites·17 claims
- 2773US7934059B2Method, system and computer program product for preventing lockout and stalling conditions in a multi-node system with speculative memory fetchingIBM·Filed 2008·Granted Apr 26, 2011·6 cites·20 claims
- 2871US9678848B2Eliminate corrupted portions of cache during runtimeIBM·Filed 2016·Granted Jun 13, 2017·1 cites·1 claims
- 2969US8930616B2System refresh in cache memoryIBM·Filed 2012·Granted Jan 6, 2015·2 cites·20 claims
- 3069US8250308B2Cache coherency protocol with built in avoidance for conflicting responsesPAPAZOVA VESSELINA K·Filed 2008·Granted Aug 21, 2012·7 cites·19 claims
- 3168US9003125B2Cache coherency protocol for allowing parallel data fetches and eviction to the same addressable indexAMBROLADZE EKATERINA M·Filed 2012·Granted Apr 7, 2015·2 cites·11 claims
- 3265US8874957B2Dynamic cache correction mechanism to allow constant access to addressable indexIBM·Filed 2013·Granted Oct 28, 2014·1 cites·8 claims
- 3364US12050538B2Castout handling in a distributed cache topologyIBM·Filed 2022·Granted Jul 30, 2024·0 cites·20 claims
- 3464US9459998B2Operations interlock under dynamic relocation of storageIBM·Filed 2015·Granted Oct 4, 2016·1 cites·20 claims
- 3564US8381019B2EDRAM macro disablement in cache memoryIBM·Filed 2010·Granted Feb 19, 2013·1 cites·16 claims
- 3664US2019251036A1Non-disruptive clearing of varying address ranges from cacheIBM·Filed 2019·Application pending·0 cites
- 3764US2019251037A1Non-disruptive clearing of varying address ranges from cacheIBM·Filed 2019·Application pending·0 cites
- 3859US11977486B2Shadow pointer directory in an inclusive hierarchical cacheIBM·Filed 2022·Granted May 7, 2024·0 cites·20 claims
- 3957US10489292B2Ownership tracking updates across multiple simultaneous operationsIBM·Filed 2017·Granted Nov 26, 2019·0 cites·6 claims
- 4055US10482015B2Ownership tracking updates across multiple simultaneous operationsIBM·Filed 2017·Granted Nov 19, 2019·0 cites·11 claims
- 4155US6151655AComputer system deadlock request resolution using timed pulsesIBM·Filed 1998·Granted Nov 21, 2000·29 cites·28 claims
- 4254US10942775B2Modified central serialization of requests in multiprocessor systemsIBM·Filed 2019·Granted Mar 9, 2021·0 cites·17 claims
- 4354US8560891B2EDRAM macro disablement in cache memoryIBM·Filed 2012·Granted Oct 15, 2013·0 cites·6 claims
- 4453US8972664B2Multilevel cache hierarchy for finding a cache line on a remote nodeIBM·Filed 2013·Granted Mar 3, 2015·0 cites·7 claims
- 4552US9086990B2Bitline deletionIBM·Filed 2013·Granted Jul 21, 2015·0 cites·14 claims
- 4652US8719618B2Dynamic cache correction mechanism to allow constant access to addressable indexAMBROLADZE EKATERINA M·Filed 2012·Granted May 6, 2014·0 cites·12 claims
- 4751US8788891B2Bitline deletionAMBROLADZE EKATERINA M·Filed 2012·Granted Jul 22, 2014·0 cites·8 claims
- 4851US7069362B2Topology for shared memory computer systemIBM·Filed 2003·Granted Jun 27, 2006·2 cites·10 claims
- 4951US6073182AMethod of resolving deadlocks between competing requests in a multiprocessor using global hang pulse logicIBM·Filed 1998·Granted Jun 6, 2000·24 cites·16 claims
- 5050US11099905B2Efficient remote resource allocation within an SMP broadcast scope maintaining fairness between operation typesIBM·Filed 2019·Granted Aug 24, 2021·0 cites·11 claims
Showing the top 50 of 66 patent records by PatentIndex Score.
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