Inventor · disambiguated record
Elisabetta Palumbo
Also filed as: PALUMBO ELISABETTA
7 granted patents·1 pending application·72 citations·filing 2000–2024
81Inventor score
Top patents by PatentIndex Score
8 records- 0186US6482698B2Method of manufacturing an electrically programmable, non-volatile memory and high-performance logic circuitry in the same semiconductor chipST MICROELECTRONICS SRL·Filed 2001·Granted Nov 19, 2002·34 cites·19 claims
- 0279US6627928B2Method of manufacturing an integrated circuit, for integrating an electrically programmable, non-volatile memory and high-performance logic circuitry in the same semiconductor chipST MICROELECTRONICS SRL·Filed 2002·Granted Sep 30, 2003·20 cites·11 claims
- 0358US2024389484A1Phase change memory element particularly suitable for embedded and automotive applicationsST MICROELECTRONICS INT NV·Filed 2024·Application pending·0 cites
- 0457US6319780B2Process for the fabrication of an integrated circuit comprising MOS transistors for low voltage, EPROM cells and MOS transistors for high voltageST MICROELECTRONICS SRL·Filed 2000·Granted Nov 20, 2001·17 cites·25 claims
- 0542US7663927B2Reading voltage generator for a non-volatile EEPROM memory cell matrix of a semiconductor device and corresponding manufacturing processST MICROELECTRONICS SRL·Filed 2007·Granted Feb 16, 2010·1 cites·22 claims
- 0634US7456467B2Process for manufacturing a byte selection transistor for a matrix of non volatile memory cells and corresponding structureZULIANI PAOLA·Filed 2005·Granted Nov 25, 2008·0 cites·18 claims
- 0731US6624471B2Lateral DMOS transistor with first and second drain electrodes in respective contact with high-and low-concentration portions of a drain regionST MICROELECTRONICS SRL·Filed 2001·Granted Sep 23, 2003·0 cites·15 claims
- 0829US6972454B2Process for manufacturing a byte selection transistor for a matrix of non volatile memory cells and corresponding structureST MICROELECTRONICS SRL·Filed 2003·Granted Dec 6, 2005·0 cites·14 claims
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