Inventor · disambiguated record
Assaf Benhamou
Also filed as: BENHAMOU ASSAF
13 granted patents·8 citations·filing 2007–2023
85Inventor score
Top patents by PatentIndex Score
13 records- 0184US10122209B1Tunable delay control of a power delivery networkINTEL CORP·Filed 2017·Granted Nov 6, 2018·4 cites·20 claims
- 0269US11805042B2Technologies for timestamping with error correctionINTEL CORP·Filed 2022·Granted Oct 31, 2023·0 cites·20 claims
- 0368US12197368B2Component firmware interaction using hardware registersINTEL CORP·Filed 2023·Granted Jan 14, 2025·0 cites·20 claims
- 0466US11546241B2Technologies for timestamping with error correctionINTEL CORP·Filed 2021·Granted Jan 3, 2023·0 cites·19 claims
- 0566US8405533B2Providing a feedback loop in a low latency serial interconnect architectureSHOOR EHUD·Filed 2010·Granted Mar 26, 2013·2 cites·20 claims
- 0663US11809353B2Component firmware interaction using hardware registersINTEL CORP·Filed 2017·Granted Nov 7, 2023·1 cites·25 claims
- 0755US11190208B2Techniques for link partner error reportingINTEL CORP·Filed 2020·Granted Nov 30, 2021·0 cites·33 claims
- 0855US11153191B2Technologies for timestamping with error correctionINTEL CORP·Filed 2018·Granted Oct 19, 2021·0 cites·21 claims
- 0952US10924132B2Techniques for link partner error reportingINTEL CORP·Filed 2017·Granted Feb 16, 2021·0 cites·25 claims
- 1049US9722717B2Technologies for ethernet link robustness for deep sleep low power applicationsINTEL CORP·Filed 2014·Granted Aug 1, 2017·0 cites·22 claims
- 1149US8175823B2Probing analog signalsMEZER AMIR·Filed 2008·Granted May 8, 2012·1 cites·13 claims
- 1243US8711018B2Providing a feedback loop in a low latency serial interconnect architectureINTEL CORP·Filed 2013·Granted Apr 29, 2014·0 cites·19 claims
- 1341US8130939B2Maintaining convergence of a receiver during changing conditionsMEZER AMIR·Filed 2007·Granted Mar 6, 2012·0 cites·21 claims
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →