Inventor · disambiguated record
Satyamurthy Pullela
Also filed as: PULLELA SATYAMURTHY
7 granted patents·1 pending application·224 citations·filing 1996–2023
88Inventor score
Technology areasG06F
Top patents by PatentIndex Score
8 records- 0165US5751593AAccurate delay prediction based on multi-model analysisMOTOROLA INC·Filed 1996·Granted May 12, 1998·48 cites·10 claims
- 0259US6651232B1Method and system for progressive clock tree or mesh construction concurrently with physical designMONTEREY DESIGN SYSTEMS INC·Filed 1998·Granted Nov 18, 2003·35 cites·66 claims
- 0358US5790415AComplementary network reduction for load modelingFiled 1996·Granted Aug 4, 1998·37 cites·14 claims
- 0458US5787008ASimulation corrected sensitivityMOTOROLA INC·Filed 1996·Granted Jul 28, 1998·39 cites·9 claims
- 0554US6367051B1System and method for concurrent buffer insertion and placement of logic gatesMONTEREY DESIGN SYSTEMS INC·Filed 1998·Granted Apr 2, 2002·31 cites·23 claims
- 0651US2024427976A1Automatic generation of multi-cycle path design constraint for forward annotation in integrated circuit designSYNOPSYS INC·Filed 2023·Application pending·0 cites
- 0746US5903471AMethod for optimizing element sizes in a semiconductor deviceMOTOROLA INC·Filed 1997·Granted May 11, 1999·20 cites·13 claims
- 0838US6074429AOptimizing combinational circuit layout through iterative restructuringMOTOROLA INC·Filed 1997·Granted Jun 13, 2000·14 cites·15 claims
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