Inventor · disambiguated record
Ya-Lan Chiou
Also filed as: CHIOU YA-LAN
5 granted patents·1 pending application·0 citations·filing 2020–2025
65Inventor score
Files withUNITED MICROELECTRONICS CORP6
Top patents by PatentIndex Score
6 records- 0189US12349369B2Layout pattern of magnetoresistive random access memoryUNITED MICROELECTRONICS CORP·Filed 2024·Granted Jul 1, 2025·0 cites·9 claims
- 0287US2025301661A1Layout pattern of magnetoresistive random access memoryUNITED MICROELECTRONICS CORP·Filed 2025·Application pending·0 cites
- 0382US12063791B2Layout pattern of magnetoresistive random access memoryUNITED MICROELECTRONICS CORP·Filed 2022·Granted Aug 13, 2024·0 cites·10 claims
- 0481US11943935B2Layout pattern of magnetoresistive random access memoryUNITED MICROELECTRONICS CORP·Filed 2022·Granted Mar 26, 2024·0 cites·9 claims
- 0572US11489010B2Layout pattern of magnetoresistive random access memoryUNITED MICROELECTRONICS CORP·Filed 2020·Granted Nov 1, 2022·0 cites·10 claims
- 0647US10978122B1Memory including non-volatile cells and current driving circuitUNITED MICROELECTRONICS CORP·Filed 2020·Granted Apr 13, 2021·0 cites·19 claims
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →