Inventor · disambiguated record
Meng-Wei Chen
Also filed as: CHEN MENG-WEI
20 granted patents·1 pending application·67 citations·filing 2003–2021
93Inventor score
Files withTAIWAN SEMICONDUCTOR MFG CO LTD9CHEN MENG-WEI2TAIWAN SEMICONDUCTOR MFG2CHEN HSIN-CHIH1CHEN KUEI SHUN1
Top patents by PatentIndex Score
21 records- 0192US8148232B2Overlay mark enhancement featureCHEN MENG-WEI·Filed 2010·Granted Apr 3, 2012·16 cites·16 claims
- 0291US8822343B2Enhanced FinFET process overlay markHSIEH CHI-WEN·Filed 2012·Granted Sep 2, 2014·14 cites·13 claims
- 0385US10073354B2Exposure method of wafer substrate, manufacturing method of semiconductor device, and exposure toolTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2015·Granted Sep 11, 2018·3 cites·20 claims
- 0485US8850369B2Metal cut process flowLUNG YUAN-HSIANG·Filed 2012·Granted Sep 30, 2014·12 cites·20 claims
- 0582US11003091B2Method of fabricating reticleTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted May 11, 2021·1 cites·20 claims
- 0682US8455982B2Overlay mark enhancement featureCHEN MENG-WEI·Filed 2012·Granted Jun 4, 2013·4 cites·10 claims
- 0777US10534272B2Method of fabricating reticleTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2018·Granted Jan 14, 2020·1 cites·20 claims
- 0876US10146141B2Lithography process and system with enhanced overlay qualityTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2014·Granted Dec 4, 2018·2 cites·20 claims
- 0975US11940737B2Method of fabricating reticleTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Granted Mar 26, 2024·0 cites·20 claims
- 1071US9129974B2Enhanced FinFET process overlay markTAIWAN SEMICONDUCTOR MFG·Filed 2014·Granted Sep 8, 2015·2 cites·20 claims
- 1171US8203836B2Cover structureCHEN HSIN-CHIH·Filed 2010·Granted Jun 19, 2012·4 cites·6 claims
- 1270US10461037B2Method for forming semiconductor device structure with overlay gratingTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2017·Granted Oct 29, 2019·1 cites·20 claims
- 1367US8840796B2Integrated circuit method with triple patterningTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Sep 23, 2014·1 cites·19 claims
- 1465US10867933B2Method for forming semiconductor device structure with overlay gratingTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Dec 15, 2020·0 cites·20 claims
- 1565US8562843B2Integrated circuit method with triple patterningLIU CHIA-CHU·Filed 2011·Granted Oct 22, 2013·1 cites·21 claims
- 1660US10734325B2Method for forming semiconductor device structure with overlay gratingTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Aug 4, 2020·0 cites·20 claims
- 1759US7097945B2Method of reducing critical dimension bias of dense pattern and isolation patternMACRONIX INT CO LTD·Filed 2003·Granted Aug 29, 2006·5 cites·4 claims
- 1847US9773671B1Material composition and process for mitigating assist feature pattern transferTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2016·Granted Sep 26, 2017·0 cites·20 claims
- 1944US8716139B2Method of patterning a semiconductor deviceLIU GEORGE·Filed 2012·Granted May 6, 2014·0 cites·20 claims
- 2039US8237297B2System and method for providing alignment mark for high-k metal gate processCHEN KUEI SHUN·Filed 2010·Granted Aug 7, 2012·0 cites·20 claims
- 2137US2004209196A1[microlithographic process]Filed 2003·Application pending·0 cites
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