Inventor · disambiguated record
Craig E. Hampel
Also filed as: HAMPEL CRAIG · HAMPEL CRAIG E · HAMPEL CRAIG EDWARD
310 granted patents·29 pending applications·9,168 citations·filing 1993–2024
99Inventor score
Top patents by PatentIndex Score
339 records- 0199US10381067B2Memory system topologies including a buffer device and an integrated circuit memory deviceRAMBUS INC·Filed 2017·Granted Aug 13, 2019·23 cites·19 claims
- 0299US7660183B2Low power memory deviceRAMBUS INC·Filed 2005·Granted Feb 9, 2010·109 cites·28 claims
- 0399US6759881B2System with phase jumping locked loop circuitRAMBUS INC·Filed 2003·Granted Jul 6, 2004·89 cites·25 claims
- 0499US6701446B2Power control system for synchronous memory deviceRAMBUS INC·Filed 2001·Granted Mar 2, 2004·184 cites·40 claims
- 0599US6675272B2Method and apparatus for coordinating memory operations among diversely-located memory componentsRAMBUS INC·Filed 2001·Granted Jan 6, 2004·224 cites·28 claims
- 0699US6496897B2Semiconductor memory device which receives write masking informationRAMBUS INC·Filed 2001·Granted Dec 17, 2002·148 cites·39 claims
- 0799US6321282B1Apparatus and method for topography dependent signalingRAMBUS INC·Filed 1999·Granted Nov 20, 2001·360 cites·50 claims
- 0898US11727982B2Memory system topologies including a memory die stackRAMBUS INC·Filed 2022·Granted Aug 15, 2023·3 cites·20 claims
- 0998US11043258B2Memory system topologies including a memory die stackRAMBUS INC·Filed 2020·Granted Jun 22, 2021·5 cites·20 claims
- 1098US10983933B2Memory module with reduced read/write turnaround overheadRAMBUS INC·Filed 2020·Granted Apr 20, 2021·6 cites·20 claims
- 1198US8555116B1Memory error detectionRAMBUS INC·Filed 2012·Granted Oct 8, 2013·38 cites·28 claims
- 1298US8359445B2Method and apparatus for signaling between devices of a memory systemRAMBUS INC·Filed 2009·Granted Jan 22, 2013·62 cites·35 claims
- 1398US8028144B2Memory module with reduced access granularityRAMBUS INC·Filed 2009·Granted Sep 27, 2011·50 cites·31 claims
- 1498US7581121B2System for a memory device having a power down mode and methodRAMBUS INC·Filed 2005·Granted Aug 25, 2009·76 cites·21 claims
- 1598US7562271B2Memory system topologies including a buffer device and an integrated circuit memory deviceRAMBUS INC·Filed 2007·Granted Jul 14, 2009·68 cites·10 claims
- 1698US7210016B2Method, system and memory controller utilizing adjustable write data delay settingsRAMBUS INC·Filed 2005·Granted Apr 24, 2007·47 cites·24 claims
- 1798US7209397B2Memory device with clock multiplier circuitRAMBUS INC·Filed 2005·Granted Apr 24, 2007·56 cites·22 claims
- 1898US7177998B2Method, system and memory controller utilizing adjustable read data delay settingsRAMBUS INC·Filed 2006·Granted Feb 13, 2007·50 cites·24 claims
- 1998US7046056B2System with dual rail regulated locked loopRAMBUS INC·Filed 2005·Granted May 16, 2006·46 cites·20 claims
- 2098US6920540B2Timing calibration apparatus and method for a memory device signaling systemRAMBUS INC·Filed 2002·Granted Jul 19, 2005·128 cites·67 claims
- 2198US6839266B1Memory module with offset data lines and bit line swizzle configurationRAMBUS INC·Filed 2002·Granted Jan 4, 2005·189 cites·12 claims
- 2298US6684263B2Apparatus and method for topography dependent signalingRAMBUS INC·Filed 2003·Granted Jan 27, 2004·127 cites·52 claims
- 2398US6516365B2Apparatus and method for topography dependent signalingRAMBUS INC·Filed 2001·Granted Feb 4, 2003·148 cites·32 claims
- 2498US6493789B2Memory device which receives write masking and automatic precharge informationRAMBUS INC·Filed 2001·Granted Dec 10, 2002·147 cites·36 claims
- 2598US6401167B1High performance cost optimized memoryRAMBUS INC·Filed 1998·Granted Jun 4, 2002·168 cites·67 claims
- 2698US6343352B1Method and apparatus for two step memory write operationsRAMBUS INC·Filed 1998·Granted Jan 29, 2002·154 cites·43 claims
- 2798US6343042B1DRAM core refresh with reduced spike currentRAMBUS INC·Filed 2000·Granted Jan 29, 2002·99 cites·9 claims
- 2898US6310814B1Rambus DRAM (RDRAM) apparatus and method for performing refresh operationsRAMBUS INC·Filed 2000·Granted Oct 30, 2001·195 cites·40 claims
- 2998US6154821AMethod and apparatus for initializing dynamic random access memory (DRAM) devices by levelizing a read domainRAMBUS INC·Filed 1998·Granted Nov 28, 2000·237 cites·24 claims
- 3098US5748914AProtocol for communication with dynamic memoryRAMBUS INC·Filed 1995·Granted May 5, 1998·227 cites·19 claims
- 3197US11467986B2Memory controller for selective rank or subrank accessRAMBUS INC·Filed 2020·Granted Oct 11, 2022·4 cites·20 claims
- 3297US11328764B2Memory system topologies including a memory die stackRAMBUS INC·Filed 2021·Granted May 10, 2022·3 cites·20 claims
- 3397US8717837B2Memory moduleRAMBUS INC·Filed 2013·Granted May 6, 2014·20 cites·20 claims
- 3497US8625371B2Memory component with terminated and unterminated signaling inputsRAMBUS INC·Filed 2013·Granted Jan 7, 2014·20 cites·20 claims
- 3597US8537601B2Memory controller with selective data transmission delayWARE FREDERICK A·Filed 2012·Granted Sep 17, 2013·20 cites·18 claims
- 3697US8364926B2Memory module with reduced access granularityRAMBUS INC·Filed 2012·Granted Jan 29, 2013·20 cites·21 claims
- 3797US8352805B2Memory error detectionRAMBUS INC·Filed 2009·Granted Jan 8, 2013·47 cites·30 claims
- 3897US8144792B2Communication channel calibration for drift conditionsWARE FREDERICK A·Filed 2007·Granted Mar 27, 2012·42 cites·34 claims
- 3997US8108607B2Memory system topologies including a buffer device and an integrated circuit memory deviceSHAEFFER IAN·Filed 2010·Granted Jan 31, 2012·25 cites·24 claims
- 4097US7577789B2Upgradable memory system with reconfigurable interconnectRAMBUS INC·Filed 2006·Granted Aug 18, 2009·50 cites·28 claims
- 4197US7400671B2Periodic calibration for communication channels by drift trackingRAMBUS INC·Filed 2007·Granted Jul 15, 2008·34 cites·19 claims
- 4297US7287119B2Integrated circuit memory device with delayed write command processingRAMBUS INC·Filed 2007·Granted Oct 23, 2007·40 cites·23 claims
- 4397US7225292B2Memory module with termination componentRAMBUS INC·Filed 2005·Granted May 29, 2007·42 cites·22 claims
- 4497US7210015B2Memory device having at least a first and a second operating modeRAMBUS INC·Filed 2005·Granted Apr 24, 2007·37 cites·24 claims
- 4597US7200055B2Memory module with termination componentRAMBUS INC·Filed 2005·Granted Apr 3, 2007·42 cites·24 claims
- 4697US7197611B2Integrated circuit memory device having write latency functionRAMBUS INC·Filed 2005·Granted Mar 27, 2007·54 cites·27 claims
- 4797US7174400B2Integrated circuit device that stores a value representative of an equalization co-efficient settingRAMBUS INC·Filed 2005·Granted Feb 6, 2007·34 cites·33 claims
- 4897US7047375B2Memory system and method for two step memory write operationsRAMBUS INC·Filed 2005·Granted May 16, 2006·40 cites·24 claims
- 4997US6266292B1DRAM core refresh with reduced spike currentRAMBUS INC·Filed 2000·Granted Jul 24, 2001·82 cites·46 claims
- 5097US6075744ADram core refresh with reduced spike currentRAMBUS INC·Filed 1998·Granted Jun 13, 2000·110 cites·11 claims
Showing the top 50 of 339 patent records by PatentIndex Score.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →