Inventor · disambiguated record
Michael G. Ahrens
Also filed as: AHRENS MICHAEL G
24 granted patents·610 citations·filing 1988–2009
97Inventor score
Top patents by PatentIndex Score
24 records- 0198US5221865AProgrammable input/output buffer circuit with test capabilityCROSSPOINT SOLUTIONS INC·Filed 1991·Granted Jun 22, 1993·134 cites·43 claims
- 0294US5534798AMultiplexer with level shift capabilitiesCROSSPOINT SOLUTIONS INC·Filed 1995·Granted Jul 9, 1996·81 cites·10 claims
- 0391US6212103B1Method for operating flash memoryXILINX INC·Filed 1999·Granted Apr 3, 2001·81 cites·13 claims
- 0486US6233177B1Bitline latch switching circuit for floating gate memory device requiring zero volt programming voltageXILINX INC·Filed 2000·Granted May 15, 2001·42 cites·13 claims
- 0581US7544968B1Non-volatile memory cell with charge storage element and method of programmingXILINX INC·Filed 2005·Granted Jun 9, 2009·8 cites·13 claims
- 0681US6249458B1Switching circuit for transference of multiple negative voltagesXILINX INC·Filed 2000·Granted Jun 19, 2001·32 cites·16 claims
- 0781US5671234AProgrammable input/output buffer circuit with test capabilityCROSSPOINT SOLUTIONS INC·Filed 1993·Granted Sep 23, 1997·26 cites·12 claims
- 0875US4918341AHigh speed static single-ended sense amplifierACTEL CORPORATON·Filed 1988·Granted Apr 17, 1990·35 cites·3 claims
- 0973US5286992ALow voltage device in a high voltage substrateACTEL CORP·Filed 1993·Granted Feb 15, 1994·35 cites·3 claims
- 1069US7687797B1Three-terminal non-volatile memory element with hybrid gate dielectricXILINX INC·Filed 2005·Granted Mar 30, 2010·3 cites·14 claims
- 1167US5299150ACircuit for preventing false programming of anti-fuse elementsACTEL CORP·Filed 1989·Granted Mar 29, 1994·32 cites·2 claims
- 1263US7420842B1Method of programming a three-terminal non-volatile memory element using source-drain biasXILINX INC·Filed 2005·Granted Sep 2, 2008·5 cites·10 claims
- 1362US5453696AEmbedded fuse resistance measuring circuitCROSSPOINT SOLUTIONS INC·Filed 1994·Granted Sep 26, 1995·21 cites·7 claims
- 1461US6687157B1Circuits and methods for identifying a defective memory cell via first, second and third wordline voltagesXILINX INC·Filed 2003·Granted Feb 3, 2004·12 cites·19 claims
- 1559US6285584B1Method to implement flash memoryXILINX INC·Filed 2001·Granted Sep 4, 2001·9 cites·5 claims
- 1659US5465055ARAM-logic tile for field programmable gate arraysCROSSPOINT SOLUTIONS INC·Filed 1994·Granted Nov 7, 1995·14 cites·16 claims
- 1758US6525973B1Automatic bitline-latch loading for flash prom testXILINX INC·Filed 2001·Granted Feb 25, 2003·10 cites·24 claims
- 1855US7450431B1PMOS three-terminal non-volatile memory element and method of programmingXILINX INC·Filed 2005·Granted Nov 11, 2008·3 cites·6 claims
- 1951US7947980B1Non-volatile memory cell with charge storage element and method of programmingXILINX INC·Filed 2009·Granted May 24, 2011·0 cites·11 claims
- 2046US6388946B1Circuit and method for incrementally selecting word linesXILINX INC·Filed 2000·Granted May 14, 2002·5 cites·4 claims
- 2145US5652527AInput-output circuit for increasing immunity to voltage spikesCROSSPOINT SOLUTIONS·Filed 1995·Granted Jul 29, 1997·6 cites·25 claims
- 2244US6272060B1Shift register clock schemeXILINX INC·Filed 2000·Granted Aug 7, 2001·4 cites·17 claims
- 2339US5629636ARam-logic tile for field programmable gate arraysCROSSPOINT SOLUTIONS INC·Filed 1995·Granted May 13, 1997·5 cites·23 claims
- 2438US6112322ACircuit and method for stress testing EEPROMSXILINX INC·Filed 1997·Granted Aug 29, 2000·7 cites·4 claims
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