Inventor · disambiguated record

Shigenobu Satoh

Also filed as: SATOH SHIGENOBU

2 granted patents·0 citations·filing 2002–2005

28Inventor score

Technology areasH10W

Files withFUJITSU LTD2

Top patents by PatentIndex Score

2 records

0142US7146592B2Integrated logic circuit and hierarchical design method thereofFUJITSU LTD·Filed 2005·Granted Dec 5, 2006·0 cites·3 claims
0235US6924666B2Integrated logic circuit and hierarchical design method thereofFUJITSU LTD·Filed 2002·Granted Aug 2, 2005·0 cites·6 claims

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