Inventor · disambiguated record
Sudhir S. Moharir
Also filed as: MOHARIR SUDHIR S
14 granted patents·55 citations·filing 1997–2017
89Inventor score
Files withSKAN TECH CORP7SKAN TECH CORPORATION3ARTISAN COMPONENTS INC1CYPRESS SEMICONDUCTOR CORP1MOHARIR SUDHIR S1
Top patents by PatentIndex Score
14 records- 0194US9490008B19T, 8T, and 7T Bitcells for 1R1W and single port static random access memories (SRAM) with single-ended read and single-ended writeSKAN TECH CORP·Filed 2015·Granted Nov 8, 2016·20 cites·12 claims
- 0289US9336861B1Static random access memory (SRAM) bitcell and memory architecture without a write bitlineSKAN TECHNOLOGIES CORP·Filed 2014·Granted May 10, 2016·14 cites·19 claims
- 0387US9697888B19T, 8T, and 7T bitcells for 1R1W and single port static random access memories (SRAM) with single-ended read and single-ended writeSKAN TECH CORP·Filed 2016·Granted Jul 4, 2017·8 cites·11 claims
- 0470US9496029B16T bitcell for dual port SRAM memories with single-ended read and single-ended write and optimized bitcells for multiport memoriesSKAN TECH CORP·Filed 2016·Granted Nov 15, 2016·3 cites·35 claims
- 0569US9627043B19T, 8T, and 7T bitcells for 1R1W and single port static random access memories (SRAM) with single-ended read and single-ended writeSKAN TECH CORP·Filed 2016·Granted Apr 18, 2017·2 cites·13 claims
- 0663US9786358B16T bitcell for single port static random access memories (SRAM) with single-ended read and single-ended writeSKAN TECH CORP·Filed 2015·Granted Oct 10, 2017·2 cites·13 claims
- 0755US8106463B2Memory cells for read only memoriesMOHARIR SUDHIR S·Filed 2005·Granted Jan 31, 2012·3 cites·5 claims
- 0853US10008280B1PPA (power performance area) efficient architecture for ROM (read only memory) and a ROM bitcell without a transistorSKAN TECH CORPORATION·Filed 2017·Granted Jun 26, 2018·0 cites·4 claims
- 0945US10026493B1PPA (power performance area) efficient architecture for rom (read only memory) and a ROM bitcell without a transistorSKAN TECH CORPORATION·Filed 2017·Granted Jul 17, 2018·0 cites·9 claims
- 1043US10014065B1PPA (power performance area) efficient architecture for ROM (read only memory) and a ROM bitcell without a transistorSKAN TECH CORPORATION·Filed 2016·Granted Jul 3, 2018·0 cites·17 claims
- 1143US9653150B1Static random access memory (SRAM) bitcell and memory architecture without a write bitlineSKAN TECH CORP·Filed 2016·Granted May 16, 2017·0 cites·5 claims
- 1242US6597613B1Load independent single ended sense amplifierARTISAN COMPONENTS INC·Filed 2002·Granted Jul 22, 2003·3 cites·22 claims
- 1332US9672904B16T bitcell for single port static random access memories (SRAM) with single-ended read and single-ended writeSKAN TECH CORP·Filed 2016·Granted Jun 6, 2017·0 cites·12 claims
- 1429US5963487AWrite enabling circuitry for a semiconductor memoryCYPRESS SEMICONDUCTOR CORP·Filed 1997·Granted Oct 5, 1999·0 cites·10 claims
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