Inventor · disambiguated record
Jaya Prakash Subramaniam Ganasan
Also filed as: GANASAN JAYA P · GANASAN JAYA PRAKASH · GANASAN JAYA PRAKASH S · GANASAN JAYA PRAKASH SUBRAMANI
26 granted patents·6 pending applications·265 citations·filing 2002–2015
96Inventor score
Files withQUALCOMM INC13IBM11HOFMANN RICHARD GERARD3GANASAN JAYA PRAKASH SUBRAMANIAM2DUROIU CRISTIAN1
Top patents by PatentIndex Score
32 records- 0195US7249210B2Bus access arbitration schemeQUALCOMM INC·Filed 2005·Granted Jul 24, 2007·58 cites·34 claims
- 0291US7984202B2Device directed memory barriersQUALCOMM INC·Filed 2007·Granted Jul 19, 2011·25 cites·31 claims
- 0388US7917676B2Efficient execution of memory barrier bus commands with order constrained memory accessesQUALCOMM INC·Filed 2006·Granted Mar 29, 2011·18 cites·22 claims
- 0485US7500045B2Minimizing memory barriers when enforcing strongly-ordered requests in a weakly-ordered processing systemQUALCOMM INC·Filed 2005·Granted Mar 3, 2009·15 cites·21 claims
- 0584US7395361B2Apparatus and methods for weighted bus arbitration among a plurality of master devices based on transfer direction and/or consumed bandwidthQUALCOMM INC·Filed 2005·Granted Jul 1, 2008·13 cites·42 claims
- 0683US7174403B2Plural bus arbitrations per cycle via higher-frequency arbiterQUALCOMM INC·Filed 2005·Granted Feb 6, 2007·12 cites·17 claims
- 0779US9286257B2Bus clock frequency scaling for a bus interconnect and related devices, systems, and methodsHOFMANN RICHARD GERARD·Filed 2011·Granted Mar 15, 2016·7 cites·68 claims
- 0877US9064050B2Arbitrating bus transactions on a communications bus based on bus device health information and related power managementDUROIU CRISTIAN·Filed 2011·Granted Jun 23, 2015·5 cites·23 claims
- 0976US9026744B2Enforcing strongly-ordered requests in a weakly-ordered processingHOFMANN RICHARD GERARD·Filed 2005·Granted May 5, 2015·8 cites·17 claims
- 1075US7065595B2Method and apparatus for bus access allocationIBM·Filed 2003·Granted Jun 20, 2006·21 cites·40 claims
- 1174US9152595B2Processor-based system hybrid ring bus interconnects, and related devices, processor-based systems, and methodsQUALCOMM INC·Filed 2012·Granted Oct 6, 2015·4 cites·39 claims
- 1268US7921249B2Weakly ordered processing systems and methodsQUALCOMM INC·Filed 2009·Granted Apr 5, 2011·3 cites·22 claims
- 1368US6970962B2Transfer request pipeline throttlingIBM·Filed 2003·Granted Nov 29, 2005·13 cites·19 claims
- 1467US7127562B2Ensuring orderly forward progress in granting snoop castout requestsIBM·Filed 2003·Granted Oct 24, 2006·12 cites·12 claims
- 1565US6907502B2Method for moving snoop pushes to the front of a request queueIBM·Filed 2002·Granted Jun 14, 2005·10 cites·27 claims
- 1663US7421529B2Method and apparatus to clear semaphore reservation for exclusive access to shared memoryQUALCOMM INC·Filed 2005·Granted Sep 2, 2008·2 cites·16 claims
- 1762US6976132B2Reducing latency of a snoop tenureIBM·Filed 2003·Granted Dec 13, 2005·8 cites·20 claims
- 1862US6973520B2System and method for providing improved bus utilization via target directed completionIBM·Filed 2002·Granted Dec 6, 2005·8 cites·23 claims
- 1962US6857029B2Scalable on-chip bus performance monitoring synchronization mechanism and method of useIBM·Filed 2002·Granted Feb 15, 2005·11 cites·27 claims
- 2057US7089376B2Reducing snoop response time for snoopers without copies of requested data via snoop filteringIBM·Filed 2003·Granted Aug 8, 2006·8 cites·13 claims
- 2155US8966291B2Method and apparatus for reducing dynamic power within system-on-a-chip routing resourcesGANASAN JAYA PRAKASH SUBRAMANIAM·Filed 2010·Granted Feb 24, 2015·1 cites·18 claims
- 2254US6985972B2Dynamic cache coherency snooper presence with variable snoop latencyIBM·Filed 2002·Granted Jan 10, 2006·3 cites·20 claims
- 2353US7685373B2Selective snooping by snoop masters to locate updated dataIBM·Filed 2008·Granted Mar 23, 2010·0 cites·9 claims
- 2451US9292442B2Methods and apparatus for improving performance of semaphore management sequences across a coherent busQUALCOMM INC·Filed 2013·Granted Mar 22, 2016·0 cites·20 claims
- 2547US2013064337A1Method and Apparatus for Adaptive Hysteresis Timer Adjustments for Clock GatingHOFMANN RICHARD GERARD·Filed 2011·Application pending·0 cites
- 2646US7395380B2Selective snooping by snoop masters to locate updated dataIBM·Filed 2003·Granted Jul 1, 2008·0 cites·8 claims
- 2746US2015074357A1Direct snoop interventionQUALCOMM INC·Filed 2014·Application pending·0 cites
- 2843US2005182884A1Multiple address two channel bus structureFiled 2004·Application pending·0 cites
- 2941US2013191572A1Transaction ordering to avoid bus deadlocksQUALCOMM INC·Filed 2012·Application pending·0 cites
- 3035US8861410B2Method and apparatus for scalable network transaction identifier for interconnectsGANASAN JAYA PRAKASH SUBRAMANIAM·Filed 2011·Granted Oct 14, 2014·0 cites·42 claims
- 3133US2017075838A1Quality of service in interconnects with multi-stage arbitrationQUALCOMM INC·Filed 2015·Application pending·0 cites
- 3232US2013117593A1Low Latency Clock Gating Scheme for Power Reduction in Bus InterconnectsNOONEY PRUDHVI N·Filed 2011·Application pending·0 cites
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →