Inventor · disambiguated record
Jerome C. Huck
Also filed as: HUCK JEROME · HUCK JEROME C
25 granted patents·1 pending application·949 citations·filing 1990–2011
97Inventor score
Files withINST THE DEV OF EMERGING ARCHI12HEWLETT PACKARD DEVELOPMENT CO6HEWLETT PACKARD CO5HUCK JEROME1INTEL CORP1
Top patents by PatentIndex Score
26 records- 0186US6151669AMethods and apparatus for efficient control of floating-point status registerINST THE DEV OF EMERGING ARCHI·Filed 1998·Granted Nov 21, 2000·122 cites·31 claims
- 0283US6845501B2Method and apparatus for enabling a compiler to reduce cache misses by performing pre-fetches in the event of context switchHEWLETT PACKARD DEVELOPMENT CO·Filed 2001·Granted Jan 18, 2005·45 cites·20 claims
- 0383US6393544B1Method and apparatus for calculating a page table index from a virtual addressINST THE DEV OF EMERGING ARCHI·Filed 1999·Granted May 21, 2002·113 cites·20 claims
- 0483US5724538AComputer memory address control apparatus utilizing hashed address tags in page tables which are compared to a combined address tag and index which are longer than the basic data width of the associated computerHEWLETT PACKARD CO·Filed 1996·Granted Mar 3, 1998·108 cites·11 claims
- 0579US6505296B2Emulated branch effected by trampoline mechanismHEWLETT PACKARD CO·Filed 2000·Granted Jan 7, 2003·28 cites·39 claims
- 0677US6654877B1System and method for selectively executing computer codeHEWLETT PACKARD DEVELOPMENT CO·Filed 2000·Granted Nov 25, 2003·25 cites·9 claims
- 0776US6643769B1System and method for enabling selective execution of computer codeHEWLETT PACKARD DEVELOPMENT CO·Filed 2000·Granted Nov 4, 2003·19 cites·12 claims
- 0876US6430657B1Computer system that provides atomicity by using a tlb to indicate whether an exportable instruction should be executed using cache coherency or by exporting the exportable instruction, and emulates instructions specifying a bus lockINST THE DEV OF EMERGING ARCHI·Filed 1998·Granted Aug 6, 2002·80 cites·6 claims
- 0972US6301705B1System and method for deferring exceptions generated during speculative executionINST THE DEV OF EMERGING ARCHI·Filed 1998·Granted Oct 9, 2001·59 cites·17 claims
- 1071US7103880B1Floating-point data speculation across a procedure call using an advanced load address tableHEWLETT PACKARD DEVELOPMENT CO·Filed 2003·Granted Sep 5, 2006·16 cites·38 claims
- 1171US5948095AMethod and apparatus for prefetching data in a computer systemINTEL CORP·Filed 1997·Granted Sep 7, 1999·51 cites·6 claims
- 1269US6286095B1Computer apparatus having special instructions to force ordered load and store operationsHEWLETT PACKARD CO·Filed 1995·Granted Sep 4, 2001·61 cites·8 claims
- 1365US6249798B1Method, apparatus and computer system for directly transferring and translating data between an integer processing unit and a floating point processing unitINST THE DEV OF EMERGING ARCHI·Filed 1996·Granted Jun 19, 2001·26 cites·30 claims
- 1464US6119218AMethod and apparatus for prefetching data in a computer systemINST THE DEV OF EMERGING ARCHI·Filed 1999·Granted Sep 12, 2000·37 cites·18 claims
- 1563US6704833B2Atomic transfer of a block of dataHEWLETT PACKARD DEVELOPMENT CO·Filed 2002·Granted Mar 9, 2004·9 cites·16 claims
- 1660US5596733ASystem for exception recovery using a conditional substitution instruction which inserts a replacement result in the destination of the excepting instructionHEWLETT PACKARD CO·Filed 1994·Granted Jan 21, 1997·33 cites·20 claims
- 1753US5928356AMethod and apparatus for selectively controlling groups of registersINST THE DEV OF EMERGING ARCHI·Filed 1997·Granted Jul 27, 1999·27 cites·17 claims
- 1850US6370639B1Processor architecture having two or more floating-point status fieldsINST THE DEV OF EMERGING ARCHI·Filed 1998·Granted Apr 9, 2002·23 cites·43 claims
- 1948US6578059B1Methods and apparatus for controlling exponent range in floating-point calculationsINST THE DEV OF EMERGING ARCHI·Filed 1998·Granted Jun 10, 2003·20 cites·22 claims
- 2046US8387053B2Method and system for enhancing computer processing performanceHEWLETT PACKARD DEVELOPMENT CO·Filed 2007·Granted Feb 26, 2013·0 cites·20 claims
- 2144US2005091456A1Determining an arrangement of data in a memory for cache efficiencyFiled 2003·Application pending·0 cites
- 2241US6212539B1Methods and apparatus for handling and storing bi-endian words in a floating-point processorINST THE DEV OF EMERGING ARCHI·Filed 1998·Granted Apr 3, 2001·13 cites·14 claims
- 2340US5278985ASoftware method for implementing dismissible instructions on a computerHEWLETT PACKARD CO·Filed 1990·Granted Jan 11, 1994·14 cites·3 claims
- 2439US6408380B1Execution of an instruction to load two independently selected registers in a single cycleINST THE DEV OF EMERGING ARCHI·Filed 1999·Granted Jun 18, 2002·10 cites·30 claims
- 2537US9519369B2Touch screen selectionHUCK JEROME·Filed 2011·Granted Dec 13, 2016·0 cites·18 claims
- 2636US6009263AEmulating agent and method for reformatting computer instructions into a standard uniform formatINST THE DEV OF EMERGING ARCHI·Filed 1997·Granted Dec 28, 1999·10 cites·14 claims
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