Inventor · disambiguated record
Chin-Kai Liu
Also filed as: LIU CHIN-KAI
10 granted patents·345 citations·filing 1996–2002
91Inventor score
Files withTAIWAN SEMICONDUCTOR MFG10
Top patents by PatentIndex Score
10 records- 0190US5700735AMethod of forming bond pad structure for the via plug processTAIWAN SEMICONDUCTOR MFG·Filed 1996·Granted Dec 23, 1997·126 cites·9 claims
- 0287US5923088ABond pad structure for the via plug processTAIWAN SEMICONDUCTOR MFG·Filed 1997·Granted Jul 13, 1999·96 cites·9 claims
- 0366US6397373B1Efficient design rule check (DRC) review systemTAIWAN SEMICONDUCTOR MFG·Filed 1999·Granted May 28, 2002·50 cites·4 claims
- 0464US5990478AMethod for preparing thin specimens consisting of domains of different materialsTAIWAN SEMICONDUCTOR MFG·Filed 1997·Granted Nov 23, 1999·28 cites·20 claims
- 0555US6403386B1Method and apparatus for identifying failure sites on IC chipsTAIWAN SEMICONDUCTOR MFG·Filed 2000·Granted Jun 11, 2002·6 cites·11 claims
- 0653US6394409B1Real time observable sample mounting fixtureTAIWAN SEMICONDUCTOR MFG·Filed 2000·Granted May 28, 2002·4 cites·19 claims
- 0745US6890772B2Method and apparatus for determining two dimensional doping profiles with SIMSTAIWAN SEMICONDUCTOR MFG·Filed 2002·Granted May 10, 2005·4 cites·19 claims
- 0845US6121059AMethod and apparatus for identifying failure sites on IC chipsTAIWAN SEMICONDUCTOR MFG·Filed 1998·Granted Sep 19, 2000·10 cites·14 claims
- 0945US5963040AMethod and apparatus for detecting pin-holes in a passivation layerTAIWAN SEMICONDUCTOR MFG·Filed 1997·Granted Oct 5, 1999·12 cites·25 claims
- 1041US6245683B1Stress relieve pattern for damascene processTAIWAN SEMICONDUCTOR MFG·Filed 1999·Granted Jun 12, 2001·9 cites·2 claims
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