Inventor · disambiguated record
Scott David Huss
Also filed as: HUSS SCOTT · HUSS SCOTT DAVID
21 granted patents·200 citations·filing 1996–2020
94Inventor score
Top patents by PatentIndex Score
21 records- 0194US11238204B1Transmitter test with interpolationCADENCE DESIGN SYSTEMS INC·Filed 2020·Granted Feb 1, 2022·4 cites·20 claims
- 0294US11228416B1Clock calibration for data serializerCADENCE DESIGN SYSTEMS INC·Filed 2020·Granted Jan 18, 2022·7 cites·20 claims
- 0393US11165554B1Transmitter test using phase-lock loopCADENCE DESIGN SYSTEMS INC·Filed 2020·Granted Nov 2, 2021·5 cites·20 claims
- 0487US11190189B1Dual path level shifter to reduce duty cycle distortionCADENCE DESIGN SYSTEMS INC·Filed 2020·Granted Nov 30, 2021·2 cites·20 claims
- 0587US10355889B1Adaptive pattern filtering for clock and data recovery to minimize interaction with decision feedback equalizationCADENCE DESIGN SYSTEMS INC·Filed 2016·Granted Jul 16, 2019·6 cites·20 claims
- 0685US11190331B1Data alignment in physical layer deviceCADENCE DESIGN SYSTEMS INC·Filed 2020·Granted Nov 30, 2021·2 cites·20 claims
- 0785US11165553B1Static clock calibration in physical layer deviceCADENCE DESIGN SYSTEMS INC·Filed 2020·Granted Nov 2, 2021·2 cites·20 claims
- 0883US5940441AIntegrated adaptive cable equalizer using a continuous-time filterIBM·Filed 1996·Granted Aug 17, 1999·45 cites·28 claims
- 0982US10367661B1Continuous time linear receiver that minimizes intersymbol interference due to pre-cursor distortionCADENCE DESIGN SYSTEMS INC·Filed 2016·Granted Jul 30, 2019·4 cites·20 claims
- 1082US10069656B1Method for preventing mis-equalizations in decision feedback equalizer based receivers for low loss channelsCADENCE DESIGN SYSTEMS INC·Filed 2017·Granted Sep 4, 2018·4 cites·17 claims
- 1181US11580048B1Reference voltage training schemeCADENCE DESIGN SYSTEMS INC·Filed 2019·Granted Feb 14, 2023·3 cites·20 claims
- 1281US9160582B1System and method for phase recovery with selective mitigation of timing corruption due to digital receiver equalizationCADENCE DESIGN SYSTEMS INC·Filed 2014·Granted Oct 13, 2015·9 cites·20 claims
- 1379US9819520B1Method of adaptively controlling the pre-cursor coefficient in a transmit equalizerCADENCE DESIGN SYSTEMS INC·Filed 2016·Granted Nov 14, 2017·3 cites·20 claims
- 1478US7127017B1Clock recovery circuit with second order digital filterRAMBUS INC·Filed 2002·Granted Oct 24, 2006·34 cites·25 claims
- 1578US6067327AData transmitter and method thereforIBM·Filed 1997·Granted May 23, 2000·42 cites·27 claims
- 1676US10133292B1Low supply current mirrorCADENCE DESIGN SYSTEMS INC·Filed 2016·Granted Nov 20, 2018·3 cites·20 claims
- 1775US11133793B1Phase interpolator with phase adjuster for step resolutionCADENCE DESIGN SYSTEMS INC·Filed 2020·Granted Sep 28, 2021·1 cites·18 claims
- 1873US9998303B1Method of adaptively controlling a low frequency equalizerCADENCE DESIGN SYSTEMS INC·Filed 2016·Granted Jun 12, 2018·2 cites·20 claims
- 1966US5731737AMethod and apparatus for reducing clock switching noise in continuous time filtersIBM·Filed 1996·Granted Mar 24, 1998·21 cites·20 claims
- 2057US10153774B1Transconductor circuit for a fourth order PLLCADENCE DESIGN SYSTEMS INC·Filed 2017·Granted Dec 11, 2018·1 cites·14 claims
- 2149US11108425B1Pause control for a calibration sequenceCADENCE DESIGN SYSTEMS INC·Filed 2020·Granted Aug 31, 2021·0 cites·20 claims
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →