Inventor

GUILLORN MICHAEL A

US235 patents

⚠️ This page may combine multiple inventors who share the name “GUILLORN MICHAEL A”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

GUILLORN MICHAEL A

IBM

Nanosheet MOSFET with full-height air-gap spacer

Fin field effect transistor devices with self-aligned source and drain regions

Integrating and isolating nFET and pFET nanosheet transistors on a substrate

Dual channel structures with multiple threshold voltages

Co-integration of silicon and silicon-germanium channels for nanosheet devices

Atomic layer deposition sealing integration for nanosheet complementary metal oxide semiconductor with replacement spacer

Accurate control of distance between suspended semiconductor nanowires and substrate surface

Nanowire mesh device and method of fabricating same

Nanowire mesh device and method of fabricating same

Dual strained nanosheet CMOS and methods for fabricating

Method for fabricating a semiconductor device including gate-to-bulk substrate isolation

High density programmable e-fuse co-integrated with vertical FETs

Trench silicide with self-aligned contact vias

Integrated etch stop for capped gate and method for manufacturing the same

Pattern decomposition for directed self assembly patterns templated by sidewall image transfer

Method for making nanosheet CMOS device integrating atomic layer deposition process and replacement gate structure

Nanosheet MOSFET with full-height air-gap spacer

Nanosheet MOSFET with full-height air-gap spacer

Compressive (PFET) and tensile (NFET) channel strain in nanowire FETs fabricated with a replacement gate process

Self-aligned inner-spacer replacement process using implantation

Electrode pair fabrication using directed self assembly of diblock copolymers

Fin-last replacement metal gate FinFET

Fin design level mask decomposition for directed self assembly

Generative adversarial networks for generating physical design layout patterns of integrated multi-layers

Generative adversarial networks for generating physical design layout patterns

UT BATTELLE LLC

Controlled alignment catalytically grown nanostructures

Gated fabrication of nanostructure field emission cathode material within a device

Nanoengineered membranes for controlled transport

Nanoconduits and nanoreplicants

Single self-aligned carbon containing tips

Carbon tips with expanded bases grown with simultaneous application of carbon source and etchant gases

Controlled non-normal alignment of catalytically grown nanostructures in a large-scale synthesis process

Individually electrically addressable vertically aligned carbon nanofibers on insulating substrates

CHANG JOSEPHINE

Nanomesh SRAM cell

Single gate inverter nanowire mesh

Nanowire mesh FET with multiple threshold voltages

Preventing shorting of adjacent devices

Single gate inverter nanowire mesh

Nanomesh SRAM cell

CHANG JOSEPHINE B

Fin-last replacement metal gate FinFET process

Fin field effect transistor devices with self-aligned source and drain regions

Raised isolation structure self-aligned to fin structures

Replacement spacer for tunnel FETs

GUILLORN MICHAEL A

Micromechanical device and methods to fabricate same using hard mask resistant to structure release etch

GLOBALFOUNDRIES INC

Low-temperature sidewall image transfer process using ALD metals, metal oxides and metal nitrides

BANGSARUNTIP SARUNYA

Process for forming a surrounding gate for a nanowire using a sacrificial patternable dielectric

COHEN GUY

Compressive (PFET) and tensile (NFET) channel strain in nanowire FETs fabricated with a replacement gate process

COHEN GUY M

Replacement contacts for all-around contacts

ANDERSON BRENT A

Maskless inter-well deep trench isolation structure and methods of manufacture

MCKNIGHT TIMOTHY E

Parallel macromolecular delivery and biochemical/electrochemical interface to cells employing nanostructures