Inventor · disambiguated record
Gordon B. Bell
Also filed as: BELL GORDON · BELL GORDON B · BELL GORDON BERNARD
7 granted patents·1 pending application·25 citations·filing 2007–2012
80Inventor score
Technology areasG06F
Top patents by PatentIndex Score
8 records- 0180US9262170B2Out-of-order checkpoint reclamation in a checkpoint processing and recovery core microarchitectureKRISHNA ANIL·Filed 2012·Granted Feb 16, 2016·7 cites·21 claims
- 0279US8200905B2Effective prefetching with multiple processors and threadsBELL GORDON BERNARD·Filed 2008·Granted Jun 12, 2012·10 cites·10 claims
- 0369US8572325B2Dynamic adjustment of read/write ratio of a disk cacheBALAKRISHNAN GANESH·Filed 2010·Granted Oct 29, 2013·3 cites·20 claims
- 0468US8543767B2Prefetching with multiple processors and threads via a coherency busBELL GORDON B·Filed 2012·Granted Sep 24, 2013·3 cites·6 claims
- 0555US8639886B2Store-to-load forwarding mechanism for processor runahead mode operationBELL GORDON·Filed 2009·Granted Jan 28, 2014·1 cites·18 claims
- 0655US8140767B2Cache management through delayed writebackBELL GORDON BERNARD·Filed 2009·Granted Mar 20, 2012·1 cites·14 claims
- 0751US8140758B2Data reorganization in non-uniform cache access cachesBALAKRISHNAN GANESH·Filed 2009·Granted Mar 20, 2012·0 cites·19 claims
- 0846US2009157968A1Cache Memory with Extended Set-associativity of Partner SetsIBM·Filed 2007·Application pending·0 cites
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →