Inventor · disambiguated record
Harsh Sharangpani
Also filed as: SHARANGPANI HARSH · SHARANGPANI HARSHVARDHAN
7 granted patents·441 citations·filing 1995–2003
89Inventor score
Technology areasG06F
Files withINTEL CORP7
Top patents by PatentIndex Score
7 records- 0194US6408386B1Method and apparatus for providing event handling functionality in a computer systemINTEL CORP·Filed 2001·Granted Jun 18, 2002·90 cites·15 claims
- 0284US6108772AMethod and apparatus for supporting multiple floating point processing modelsINTEL CORP·Filed 1996·Granted Aug 22, 2000·114 cites·11 claims
- 0384US5774686AMethod and apparatus for providing two system architectures in a processorINTEL CORP·Filed 1995·Granted Jun 30, 1998·104 cites·66 claims
- 0477US6560696B1Return register stack target predictorINTEL CORP·Filed 1999·Granted May 6, 2003·71 cites·20 claims
- 0570US6219774B1Address translation with/bypassing intermediate segmentation translation to accommodate two different instruction set architectureINTEL CORP·Filed 1998·Granted Apr 17, 2001·48 cites·14 claims
- 0666US6584558B2Article for providing event handling functionality in a processor supporting different instruction setsINTEL CORP·Filed 2002·Granted Jun 24, 2003·10 cites·15 claims
- 0755US7152153B2Bi-directional return register stack recovery from speculative execution of call/return upon branch mispredictionINTEL CORP·Filed 2003·Granted Dec 19, 2006·4 cites·10 claims
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