Inventor · disambiguated record
Tetsuaki Okahiro
Also filed as: OKAHIRO TETSUAKI
12 granted patents·1 pending application·88 citations·filing 2009–2019
89Inventor score
Technology areasG11C
Top patents by PatentIndex Score
13 records- 0194US8451677B2Semiconductor device and method of refreshing the sameOKAHIRO TETSUAKI·Filed 2012·Granted May 28, 2013·42 cites·20 claims
- 0293US10347321B1Apparatuses and methods for providing driving signals in semiconductor devicesMICRON TECHNOLOGY INC·Filed 2018·Granted Jul 9, 2019·14 cites·20 claims
- 0388US8804446B2Semiconductor device having equalizing circuit equalizing pair of bit linesOKAHIRO TETSUAKI·Filed 2011·Granted Aug 12, 2014·15 cites·20 claims
- 0480US9043539B2Semiconductor device having a memory and calibration circuit that selectively adjusts an impedance of an output buffer dependent upon refresh commandsKAIWA NAKABA·Filed 2010·Granted May 26, 2015·7 cites·18 claims
- 0568US9378799B2Semiconductor device having a memory and calibration circuit that adjusts output buffer impedance dependent upon auto-refresh commandsPS4 LUXCO S A R I·Filed 2015·Granted Jun 28, 2016·3 cites·17 claims
- 0667US8000123B2Semiconductor memory device of open bit line typeELPIDA MEMORY INC·Filed 2009·Granted Aug 16, 2011·5 cites·10 claims
- 0753US9472264B2Semiconductor memory device having sense amplifierMICRON TECHNOLOGY INC·Filed 2015·Granted Oct 18, 2016·1 cites·20 claims
- 0850US10607689B2Apparatuses and methods for providing driving signals in semiconductor devicesMICRON TECHNOLOGY INC·Filed 2019·Granted Mar 31, 2020·0 cites·20 claims
- 0947US8068375B2Semiconductor device and method of refreshing the sameOKAHIRO TETSUAKI·Filed 2009·Granted Nov 29, 2011·1 cites·8 claims
- 1044USRE46202ESemiconductor memory device of open bit line typePS4 LUXCO SARL·Filed 2013·Granted Nov 8, 2016·0 cites·22 claims
- 1141US8274855B2Semiconductor device for performing a refresh operationOKAHIRO TETSUAKI·Filed 2011·Granted Sep 25, 2012·0 cites·20 claims
- 1237US8391085B2Semiconductor memory device capable of matching the timing between sub-amplifier control signal and column selection signalOKAHIRO TETSUAKI·Filed 2009·Granted Mar 5, 2013·0 cites·10 claims
- 1333US2012124436A1Semiconductor memory device performing parallel test operationOKAHIRO TETSUAKI·Filed 2011·Application pending·0 cites
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