Inventor · disambiguated record
James Aarestad
Also filed as: AARESTAD JAMES
3 granted patents·6 citations·filing 2014–2020
61Inventor score
Technology areasH03K
Files withSTC UNM3
Top patents by PatentIndex Score
3 records- 0183US10868535B2Systems and methods for leveraging path delay variations in a circuit and generating error-tolerant bitstringsSTC UNM·Filed 2020·Granted Dec 15, 2020·2 cites·18 claims
- 0279US10230369B2Systems and methods for leveraging path delay variations in a circuit and generating error-tolerant bitstringsSTC UNM·Filed 2014·Granted Mar 12, 2019·4 cites·20 claims
- 0355US10666256B2Systems and methods for leveraging path delay variations in a circuit and generating error-tolerant bitstringsSTC UNM·Filed 2018·Granted May 26, 2020·0 cites·22 claims
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →