Inventor · disambiguated record
Peter J. Windler
Also filed as: WINDLER PETER · WINDLER PETER J · WINDLER PETER JOHN
17 granted patents·1 pending application·157 citations·filing 1997–2015
93Inventor score
Top patents by PatentIndex Score
18 records- 0184US9715887B2Magnetic recording system using pattern dependent writer having register pages for storing write currentsAVAGO TECHNOLOGIES GENERAL IP·Filed 2015·Granted Jul 25, 2017·7 cites·20 claims
- 0284US6650194B1Phase shift control for voltage controlled oscillatorIBM·Filed 2000·Granted Nov 18, 2003·22 cites·8 claims
- 0382US7640463B2On-chip receiver eye finder circuit for high-speed serial linkLSI CORP·Filed 2006·Granted Dec 29, 2009·13 cites·17 claims
- 0482US6282038B1Variable gain amplifier with temperature compensation for use in a disk drive systemIBM·Filed 1999·Granted Aug 28, 2001·37 cites·31 claims
- 0581US9001446B1System and method for power saving modes in multi-sensor magnetic recordingLSI CORP·Filed 2014·Granted Apr 7, 2015·5 cites·16 claims
- 0681US6566922B1Zero phase and frequency restart PLLLSI LOGIC CORP·Filed 2001·Granted May 20, 2003·15 cites·18 claims
- 0781US6043942ASelectable write precompensation in a direct access storage device (DASD)IBM·Filed 1997·Granted Mar 28, 2000·35 cites·12 claims
- 0878US9754610B2Magnetic recording system with ternary pattern dependent write signalingAVAGO TECHNOLOGIES GENERAL IP·Filed 2015·Granted Sep 5, 2017·4 cites·20 claims
- 0972US7869498B2Low power decision feedback equalization (DFE) through applying DFE data to input data in a data latchLSI CORP·Filed 2007·Granted Jan 11, 2011·5 cites·12 claims
- 1071US9064539B1Systems and methods for timing control in a data processing systemAVAGO TECHNOLOGIES GENERAL IP·Filed 2014·Granted Jun 23, 2015·2 cites·20 claims
- 1169US7668239B2System and method for transmit timing precompensation for a serial transmission communication channelLSI CORP·Filed 2006·Granted Feb 23, 2010·4 cites·14 claims
- 1268US9721588B2Magnetic recording system including differentiated write current emphasis signal generator circuitAVAGO TECHNOLOGIES GENERAL IP·Filed 2015·Granted Aug 1, 2017·2 cites·20 claims
- 1365US8437388B2Data latch circuit and method of a low power decision feedback equalization (DFE) systemZENG YI·Filed 2010·Granted May 7, 2013·2 cites·26 claims
- 1459US9281833B2Analog-to-digital converter with power supply-based referenceMCNEILL BRUCE WALTER·Filed 2012·Granted Mar 8, 2016·2 cites·20 claims
- 1541US6614269B1Integrated polyphase amplitude detectorLSI LOGIC CORP·Filed 2002·Granted Sep 2, 2003·0 cites·12 claims
- 1640US8874410B2Systems and methods for pattern detectionZHANG XUN·Filed 2011·Granted Oct 28, 2014·0 cites·19 claims
- 1732US2003001626A1Detection of voltage amplitude using currentIBM·Filed 2001·Application pending·0 cites
- 1829US6313962B1Combined read and write VCO for DASD PRML channelsIBM·Filed 1998·Granted Nov 6, 2001·2 cites·30 claims
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