Inventor · disambiguated record
Georg Braun
Also filed as: BRAUN GEORG
59 granted patents·7 pending applications·796 citations·filing 1999–2008
98Inventor score
Top patents by PatentIndex Score
66 records- 0199US6724685B2Configuration for data transmission in a semiconductor memory system, and relevant data transmission methodINFINEON TECHNOLOGIES AG·Filed 2002·Granted Apr 20, 2004·230 cites·17 claims
- 0295US7457174B2Semiconductor memory and method for adapting the phase relationship between a clock signal and strobe signal during the acceptance of write data to be transmittedINFINEON TECHNOLOGIES AG·Filed 2006·Granted Nov 25, 2008·56 cites·24 claims
- 0394US7796446B2Memory dies for flexible use and method for configuring memory diesQIMONDA AG·Filed 2008·Granted Sep 14, 2010·44 cites·19 claims
- 0494US6958613B2Method for calibrating semiconductor devices using a common calibration reference and a calibration circuitINFINEON TECHNOLOGIES AG·Filed 2003·Granted Oct 25, 2005·82 cites·14 claims
- 0593US7272063B1Memory with a temperature sensor, dynamic memory and memory with a clock unit and method of sensing a temperature of a memoryINFINEON TECHNOLOGIES AG·Filed 2006·Granted Sep 18, 2007·34 cites·22 claims
- 0691US7362622B2System for determining a reference level and evaluating a signal on the basis of the reference levelINFINEON TECHNOLOGIES AG·Filed 2005·Granted Apr 22, 2008·25 cites·26 claims
- 0789US7397684B2Semiconductor memory array with serial control/address busINFINEON TECHNOLOGIES AG·Filed 2005·Granted Jul 8, 2008·22 cites·17 claims
- 0884US8041865B2Bus termination system and methodQIMONDA AG·Filed 2008·Granted Oct 18, 2011·14 cites·66 claims
- 0982US7848153B2High speed memory architectureQIMONDA AG·Filed 2008·Granted Dec 7, 2010·13 cites·30 claims
- 1081US7275189B2Memory module and method for operating a memory module in a data memory systemINFINEON TECHNOLOGIES AG·Filed 2003·Granted Sep 25, 2007·28 cites·18 claims
- 1176US6452852B2Semiconductor memory configuration with a refresh logic circuit, and method of refreshing a memory content of the semiconductor memory configurationINFINEON TECHNOLOGIES AG·Filed 2001·Granted Sep 17, 2002·24 cites·7 claims
- 1275US7721130B2Apparatus and method for switching an apparatus to a power saving modeQIMONDA AG·Filed 2006·Granted May 18, 2010·8 cites·33 claims
- 1374US6351422B2Integrated memory having a differential sense amplifierINFINEON TECHNOLOGIES AG·Filed 2001·Granted Feb 26, 2002·21 cites·6 claims
- 1471US7771206B2Horizontal dual in-line memory modulesQIMONDA AG·Filed 2008·Granted Aug 10, 2010·4 cites·34 claims
- 1570US6500677B2Method for fabricating a ferroelectric memory configurationINFINEON TECHNOLOGIES AG·Filed 2001·Granted Dec 31, 2002·13 cites·20 claims
- 1668US6091625AFerroelectric memory and method for preventing aging in a memory cellSIEMENS AG·Filed 1999·Granted Jul 18, 2000·29 cites·8 claims
- 1767US7447805B2Buffer chip and method for controlling one or more memory arrangementsINFINEON TECHNOLOGIES AG·Filed 2004·Granted Nov 4, 2008·12 cites·20 claims
- 1867US6820197B2Data processing system having configurable componentsINFINEON TECHNOLOGIES AG·Filed 2001·Granted Nov 16, 2004·13 cites·8 claims
- 1965US6759874B2Electronic circuit with a driver circuitINFINEON TECHNOLOGIES AG·Filed 2002·Granted Jul 6, 2004·12 cites·12 claims
- 2062US7532523B2Memory chip with settable termination resistance circuitQIMONDA AG·Filed 2006·Granted May 12, 2009·5 cites·10 claims
- 2162US7149864B2Method and circuit for allocating memory arrangement addressesINFINEON TECHNOLOGIES AG·Filed 2004·Granted Dec 12, 2006·8 cites·20 claims
- 2261US6538273B2Ferroelectric transistor and method for fabricating itINFINEON TECHNOLOGIES AG·Filed 2001·Granted Mar 25, 2003·9 cites·10 claims
- 2360US6392918B2Circuit configuration for generating a reference voltage for reading a ferroelectric memoryINFINEON TECHNOLOGIES AG·Filed 2001·Granted May 21, 2002·11 cites·3 claims
- 2455US7646650B2Buffer component for a memory module, and a memory module and a memory system having such buffer componentINFINEON TECHNOLOGIES AG·Filed 2006·Granted Jan 12, 2010·3 cites·23 claims
- 2551US6715138B2Method for combining logic-based circuit units and memory-based circuit units and circuit arrangementINFINEON TECHNOLOGIES AG·Filed 2002·Granted Mar 30, 2004·2 cites·7 claims
- 2651US2006202328A1Memory module and memory configuration with stub-free signal lines and distributed capacitive loadsINFINEON TECHNOLOGIES AG·Filed 2006·Application pending·0 cites
- 2750US8161219B2Distributed command and address bus architecture for a memory module having portions of bus lines separately disposedBRUENNERT MICHAEL·Filed 2008·Granted Apr 17, 2012·0 cites·28 claims
- 2848US7139290B2Transmitting data into a memory cell arrayINFINEON TECHNOLOGIES AG·Filed 2002·Granted Nov 21, 2006·5 cites·12 claims
- 2947US6487128B2Integrated memory having memory cells and reference cells, and operating method for such a memoryINFINEON TECHNOLOGIES AG·Filed 2001·Granted Nov 26, 2002·5 cites·10 claims
- 3047US6469571B2Charge pump with charge equalization for improved efficiencyINFINEON TECHNOLOGIES AG·Filed 2001·Granted Oct 22, 2002·7 cites·9 claims
- 3147US6424558B2Ferroelectric memory array composed of a multiplicity of memory cells each having at least one selection transistor and one storage capacitor driven via word lines and bit linesINFINEON TECHNOLOGIES AG·Filed 2001·Granted Jul 23, 2002·5 cites·5 claims
- 3246US7936201B2Apparatus and method for providing a signal for transmission via a signal lineQIMONDA AG·Filed 2006·Granted May 3, 2011·0 cites·28 claims
- 3346US7440349B2Integrated semiconductor memory with determination of a chip temperatureQIMONDA AG·Filed 2006·Granted Oct 21, 2008·1 cites·17 claims
- 3446US6635947B2Monolithically integrable inductorINFINEON TECHNOLOGIES AG·Filed 2001·Granted Oct 21, 2003·2 cites·9 claims
- 3545US7342815B2DQS signaling in DDR-III memory systems without preambleINFINEON TECHNOLOGIES AG·Filed 2005·Granted Mar 11, 2008·1 cites·12 claims
- 3645US7127553B2Method for determining the optimum access strategyINFINEON TECHNOLOGIES AG·Filed 2003·Granted Oct 24, 2006·0 cites·4 claims
- 3745US6911732B2Integrated circuitINFINEON TECHNOLOGIES AG·Filed 2002·Granted Jun 28, 2005·1 cites·21 claims
- 3845US2004230759A1Synchronous memory system and also method and protocol for communication in a synchronous memory systemFiled 2004·Application pending·0 cites
- 3944US6697279B2Ferroelectric read/write memory with series-connected memory cells (CFRAM)INFINEON TECHNOLOGIES AG·Filed 2001·Granted Feb 24, 2004·4 cites·4 claims
- 4044US6504747B2Integrated memory with plate line segmentsINFINEON TECHNOLOGIES AG·Filed 2001·Granted Jan 7, 2003·4 cites·5 claims
- 4144US6480044B2Semiconductor circuit configurationINFINEON TECHNOLOGIES AG·Filed 2001·Granted Nov 12, 2002·2 cites·15 claims
- 4244US2010032820A1Stacked Memory ModuleBRUENNERT MICHAEL·Filed 2008·Application pending·0 cites
- 4343US2004085795A1Memory module and memory configuration with stub-free signal lines and distributed capacitive loadsFiled 2003·Application pending·0 cites
- 4442US6894330B2Memory configuration and method for reading a state from and storing a state in a ferroelectric transistorINFINEON TECHNOLOGIES AG·Filed 2001·Granted May 17, 2005·4 cites·8 claims
- 4542US6480055B2Decoder element for generating an output signal having three different potentials and an operating method for the decoder elementINFINEON TECHNOLOGIES AG·Filed 2001·Granted Nov 12, 2002·3 cites·5 claims
- 4642US6459626B1Integrated memory having memory cells and reference cells, and corresponding operating methodINFINEON TECHNOLOGIES AG·Filed 2001·Granted Oct 1, 2002·3 cites·5 claims
- 4742US6434039B1Circuit configuration for reading a memory cell having a ferroelectric capacitorINFINEON TECHNOLOGIES AG·Filed 2001·Granted Aug 13, 2002·3 cites·6 claims
- 4841US6137712AFerroelectric memory configurationINFINEON TECHNOLOGIES AG·Filed 1999·Granted Oct 24, 2000·7 cites·5 claims
- 4941US2002062431A1Method and device for processing data in a memory unitFiled 2001·Application pending·0 cites
- 5041US2008123792A1Apparatus and method for transmitting signals over a signal linePRETE EDOARDO·Filed 2006·Application pending·0 cites
Showing the top 50 of 66 patent records by PatentIndex Score.
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