Inventor · disambiguated record
Sandra Johnson Baylor
Also filed as: BAYLOR SANDRA J · BAYLOR SANDRA JOHNSON
12 granted patents·778 citations·filing 1991–2000
94Inventor score
Files withIBM12
Top patents by PatentIndex Score
12 records- 0189US5862158AEfficient method for providing fault tolerance against double device failures in multiple device systemsIBM·Filed 1996·Granted Jan 19, 1999·156 cites·23 claims
- 0289US5313609AOptimum write-back strategy for directory-based cache coherence protocolsIBM·Filed 1991·Granted May 17, 1994·152 cites·17 claims
- 0386US6938252B2Hardware-assisted method for scheduling threads using data cache localityIBM·Filed 2000·Granted Aug 30, 2005·65 cites·30 claims
- 0482US5634096AUsing virtual disks for disk system checkpointingIBM·Filed 1994·Granted May 27, 1997·91 cites·13 claims
- 0578US5822763ACache coherence protocol for reducing the effects of false sharing in non-bus-based shared-memory multiprocessorsIBM·Filed 1996·Granted Oct 13, 1998·89 cites·16 claims
- 0677US6094709ACache coherence for lazy entry consistency in lockup-free cachesIBM·Filed 1997·Granted Jul 25, 2000·87 cites·9 claims
- 0763US5893922AHome node migration for distributed shared memory systemsIBM·Filed 1997·Granted Apr 13, 1999·43 cites·5 claims
- 0855US5778437AInvalidation bus optimization for multiprocessors using directory-based cache coherence protocols in which an address of a line to be modified is placed on the invalidation bus simultaneously with sending a modify request to the directoryIBM·Filed 1995·Granted Jul 7, 1998·31 cites·10 claims
- 0949US6175899B1Method for providing virtual atomicity in multi processor environment having access to multilevel cachesIBM·Filed 1997·Granted Jan 16, 2001·23 cites·9 claims
- 1046US5742812AParallel network communications protocol using token passingIBM·Filed 1995·Granted Apr 21, 1998·21 cites·33 claims
- 1141US6360302B1Method and system for dynamically changing page types in unified scalable shared-memory architecturesIBM·Filed 1999·Granted Mar 19, 2002·13 cites·24 claims
- 1234US6148375AHierarchical bus simple COMA architecture for shared memory multiprocessors having a bus directly interconnecting caches between nodesIBM·Filed 1998·Granted Nov 14, 2000·7 cites·3 claims
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