Inventor · disambiguated record
Hyun-Jeong Roh
Also filed as: ROH HYUN-JEONG
4 granted patents·19 citations·filing 2015–2020
70Inventor score
Top patents by PatentIndex Score
4 records- 0191US9934347B2Integrated circuit and method of designing layout of integrated circuitSEO JAE WOO·Filed 2015·Granted Apr 3, 2018·12 cites·16 claims
- 0289US10651201B2Integrated circuit including interconnection and method of fabricating the same, the interconnection including a pattern shaped and/or a via disposed for mitigating electromigrationSAMSUNG ELECTRONICS CO LTD·Filed 2018·Granted May 12, 2020·6 cites·18 claims
- 0372US10691859B2Integrated circuit and method of designing layout of integrated circuitSAMSUNG ELECTRONICS CO LTD·Filed 2018·Granted Jun 23, 2020·1 cites·20 claims
- 0461US11189639B2Integrated circuit including interconnection and method of fabricating the same, the interconnection including a pattern shaped for mitigating electromigrationSAMSUNG ELECTRONICS CO LTD·Filed 2020·Granted Nov 30, 2021·0 cites·18 claims
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →